1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrl: Ctrl,
5 statusa: Statusa,
6 statusb: Statusb,
7 _reserved3: [u8; 0x01],
8 addr: Addr,
9 length: Length,
10 data: Data,
11 dcc: [Dcc; 2],
12 did: Did,
13 cfg: Cfg,
14 _reserved9: [u8; 0xd0],
15 dcfg: [Dcfg; 2],
16 _reserved10: [u8; 0x0f08],
17 entry0: Entry0,
18 entry1: Entry1,
19 end: End,
20 _reserved13: [u8; 0x0fc0],
21 memtype: Memtype,
22 pid4: Pid4,
23 pid5: Pid5,
24 pid6: Pid6,
25 pid7: Pid7,
26 pid0: Pid0,
27 pid1: Pid1,
28 pid2: Pid2,
29 pid3: Pid3,
30 cid0: Cid0,
31 cid1: Cid1,
32 cid2: Cid2,
33 cid3: Cid3,
34}
35impl RegisterBlock {
36 #[doc = "0x00 - Control"]
37 #[inline(always)]
38 pub const fn ctrl(&self) -> &Ctrl {
39 &self.ctrl
40 }
41 #[doc = "0x01 - Status A"]
42 #[inline(always)]
43 pub const fn statusa(&self) -> &Statusa {
44 &self.statusa
45 }
46 #[doc = "0x02 - Status B"]
47 #[inline(always)]
48 pub const fn statusb(&self) -> &Statusb {
49 &self.statusb
50 }
51 #[doc = "0x04 - Address"]
52 #[inline(always)]
53 pub const fn addr(&self) -> &Addr {
54 &self.addr
55 }
56 #[doc = "0x08 - Length"]
57 #[inline(always)]
58 pub const fn length(&self) -> &Length {
59 &self.length
60 }
61 #[doc = "0x0c - Data"]
62 #[inline(always)]
63 pub const fn data(&self) -> &Data {
64 &self.data
65 }
66 #[doc = "0x10..0x18 - Debug Communication Channel n"]
67 #[inline(always)]
68 pub const fn dcc(&self, n: usize) -> &Dcc {
69 &self.dcc[n]
70 }
71 #[doc = "Iterator for array of:"]
72 #[doc = "0x10..0x18 - Debug Communication Channel n"]
73 #[inline(always)]
74 pub fn dcc_iter(&self) -> impl Iterator<Item = &Dcc> {
75 self.dcc.iter()
76 }
77 #[doc = "0x18 - Device Identification"]
78 #[inline(always)]
79 pub const fn did(&self) -> &Did {
80 &self.did
81 }
82 #[doc = "0x1c - Configuration"]
83 #[inline(always)]
84 pub const fn cfg(&self) -> &Cfg {
85 &self.cfg
86 }
87 #[doc = "0xf0..0xf8 - Device Configuration"]
88 #[inline(always)]
89 pub const fn dcfg(&self, n: usize) -> &Dcfg {
90 &self.dcfg[n]
91 }
92 #[doc = "Iterator for array of:"]
93 #[doc = "0xf0..0xf8 - Device Configuration"]
94 #[inline(always)]
95 pub fn dcfg_iter(&self) -> impl Iterator<Item = &Dcfg> {
96 self.dcfg.iter()
97 }
98 #[doc = "0x1000 - CoreSight ROM Table Entry 0"]
99 #[inline(always)]
100 pub const fn entry0(&self) -> &Entry0 {
101 &self.entry0
102 }
103 #[doc = "0x1004 - CoreSight ROM Table Entry 1"]
104 #[inline(always)]
105 pub const fn entry1(&self) -> &Entry1 {
106 &self.entry1
107 }
108 #[doc = "0x1008 - CoreSight ROM Table End"]
109 #[inline(always)]
110 pub const fn end(&self) -> &End {
111 &self.end
112 }
113 #[doc = "0x1fcc - CoreSight ROM Table Memory Type"]
114 #[inline(always)]
115 pub const fn memtype(&self) -> &Memtype {
116 &self.memtype
117 }
118 #[doc = "0x1fd0 - Peripheral Identification 4"]
119 #[inline(always)]
120 pub const fn pid4(&self) -> &Pid4 {
121 &self.pid4
122 }
123 #[doc = "0x1fd4 - Peripheral Identification 5"]
124 #[inline(always)]
125 pub const fn pid5(&self) -> &Pid5 {
126 &self.pid5
127 }
128 #[doc = "0x1fd8 - Peripheral Identification 6"]
129 #[inline(always)]
130 pub const fn pid6(&self) -> &Pid6 {
131 &self.pid6
132 }
133 #[doc = "0x1fdc - Peripheral Identification 7"]
134 #[inline(always)]
135 pub const fn pid7(&self) -> &Pid7 {
136 &self.pid7
137 }
138 #[doc = "0x1fe0 - Peripheral Identification 0"]
139 #[inline(always)]
140 pub const fn pid0(&self) -> &Pid0 {
141 &self.pid0
142 }
143 #[doc = "0x1fe4 - Peripheral Identification 1"]
144 #[inline(always)]
145 pub const fn pid1(&self) -> &Pid1 {
146 &self.pid1
147 }
148 #[doc = "0x1fe8 - Peripheral Identification 2"]
149 #[inline(always)]
150 pub const fn pid2(&self) -> &Pid2 {
151 &self.pid2
152 }
153 #[doc = "0x1fec - Peripheral Identification 3"]
154 #[inline(always)]
155 pub const fn pid3(&self) -> &Pid3 {
156 &self.pid3
157 }
158 #[doc = "0x1ff0 - Component Identification 0"]
159 #[inline(always)]
160 pub const fn cid0(&self) -> &Cid0 {
161 &self.cid0
162 }
163 #[doc = "0x1ff4 - Component Identification 1"]
164 #[inline(always)]
165 pub const fn cid1(&self) -> &Cid1 {
166 &self.cid1
167 }
168 #[doc = "0x1ff8 - Component Identification 2"]
169 #[inline(always)]
170 pub const fn cid2(&self) -> &Cid2 {
171 &self.cid2
172 }
173 #[doc = "0x1ffc - Component Identification 3"]
174 #[inline(always)]
175 pub const fn cid3(&self) -> &Cid3 {
176 &self.cid3
177 }
178}
179#[doc = "CTRL (w) register accessor: Control\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
180module"]
181#[doc(alias = "CTRL")]
182pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
183#[doc = "Control"]
184pub mod ctrl;
185#[doc = "STATUSA (rw) register accessor: Status A\n\nYou can [`read`](crate::Reg::read) this register and get [`statusa::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`statusa::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusa`]
186module"]
187#[doc(alias = "STATUSA")]
188pub type Statusa = crate::Reg<statusa::StatusaSpec>;
189#[doc = "Status A"]
190pub mod statusa;
191#[doc = "STATUSB (r) register accessor: Status B\n\nYou can [`read`](crate::Reg::read) this register and get [`statusb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusb`]
192module"]
193#[doc(alias = "STATUSB")]
194pub type Statusb = crate::Reg<statusb::StatusbSpec>;
195#[doc = "Status B"]
196pub mod statusb;
197#[doc = "ADDR (rw) register accessor: Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`]
198module"]
199#[doc(alias = "ADDR")]
200pub type Addr = crate::Reg<addr::AddrSpec>;
201#[doc = "Address"]
202pub mod addr;
203#[doc = "LENGTH (rw) register accessor: Length\n\nYou can [`read`](crate::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`]
204module"]
205#[doc(alias = "LENGTH")]
206pub type Length = crate::Reg<length::LengthSpec>;
207#[doc = "Length"]
208pub mod length;
209#[doc = "DATA (rw) register accessor: Data\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
210module"]
211#[doc(alias = "DATA")]
212pub type Data = crate::Reg<data::DataSpec>;
213#[doc = "Data"]
214pub mod data;
215#[doc = "DCC (rw) register accessor: Debug Communication Channel n\n\nYou can [`read`](crate::Reg::read) this register and get [`dcc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcc`]
216module"]
217#[doc(alias = "DCC")]
218pub type Dcc = crate::Reg<dcc::DccSpec>;
219#[doc = "Debug Communication Channel n"]
220pub mod dcc;
221#[doc = "DID (r) register accessor: Device Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`did::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@did`]
222module"]
223#[doc(alias = "DID")]
224pub type Did = crate::Reg<did::DidSpec>;
225#[doc = "Device Identification"]
226pub mod did;
227#[doc = "CFG (rw) register accessor: Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cfg`]
228module"]
229#[doc(alias = "CFG")]
230pub type Cfg = crate::Reg<cfg::CfgSpec>;
231#[doc = "Configuration"]
232pub mod cfg;
233#[doc = "DCFG (rw) register accessor: Device Configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dcfg::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcfg::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcfg`]
234module"]
235#[doc(alias = "DCFG")]
236pub type Dcfg = crate::Reg<dcfg::DcfgSpec>;
237#[doc = "Device Configuration"]
238pub mod dcfg;
239#[doc = "ENTRY0 (r) register accessor: CoreSight ROM Table Entry 0\n\nYou can [`read`](crate::Reg::read) this register and get [`entry0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry0`]
240module"]
241#[doc(alias = "ENTRY0")]
242pub type Entry0 = crate::Reg<entry0::Entry0Spec>;
243#[doc = "CoreSight ROM Table Entry 0"]
244pub mod entry0;
245#[doc = "ENTRY1 (r) register accessor: CoreSight ROM Table Entry 1\n\nYou can [`read`](crate::Reg::read) this register and get [`entry1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry1`]
246module"]
247#[doc(alias = "ENTRY1")]
248pub type Entry1 = crate::Reg<entry1::Entry1Spec>;
249#[doc = "CoreSight ROM Table Entry 1"]
250pub mod entry1;
251#[doc = "END (r) register accessor: CoreSight ROM Table End\n\nYou can [`read`](crate::Reg::read) this register and get [`end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@end`]
252module"]
253#[doc(alias = "END")]
254pub type End = crate::Reg<end::EndSpec>;
255#[doc = "CoreSight ROM Table End"]
256pub mod end;
257#[doc = "MEMTYPE (r) register accessor: CoreSight ROM Table Memory Type\n\nYou can [`read`](crate::Reg::read) this register and get [`memtype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@memtype`]
258module"]
259#[doc(alias = "MEMTYPE")]
260pub type Memtype = crate::Reg<memtype::MemtypeSpec>;
261#[doc = "CoreSight ROM Table Memory Type"]
262pub mod memtype;
263#[doc = "PID4 (r) register accessor: Peripheral Identification 4\n\nYou can [`read`](crate::Reg::read) this register and get [`pid4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid4`]
264module"]
265#[doc(alias = "PID4")]
266pub type Pid4 = crate::Reg<pid4::Pid4Spec>;
267#[doc = "Peripheral Identification 4"]
268pub mod pid4;
269#[doc = "PID5 (r) register accessor: Peripheral Identification 5\n\nYou can [`read`](crate::Reg::read) this register and get [`pid5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid5`]
270module"]
271#[doc(alias = "PID5")]
272pub type Pid5 = crate::Reg<pid5::Pid5Spec>;
273#[doc = "Peripheral Identification 5"]
274pub mod pid5;
275#[doc = "PID6 (r) register accessor: Peripheral Identification 6\n\nYou can [`read`](crate::Reg::read) this register and get [`pid6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid6`]
276module"]
277#[doc(alias = "PID6")]
278pub type Pid6 = crate::Reg<pid6::Pid6Spec>;
279#[doc = "Peripheral Identification 6"]
280pub mod pid6;
281#[doc = "PID7 (r) register accessor: Peripheral Identification 7\n\nYou can [`read`](crate::Reg::read) this register and get [`pid7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid7`]
282module"]
283#[doc(alias = "PID7")]
284pub type Pid7 = crate::Reg<pid7::Pid7Spec>;
285#[doc = "Peripheral Identification 7"]
286pub mod pid7;
287#[doc = "PID0 (r) register accessor: Peripheral Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid0`]
288module"]
289#[doc(alias = "PID0")]
290pub type Pid0 = crate::Reg<pid0::Pid0Spec>;
291#[doc = "Peripheral Identification 0"]
292pub mod pid0;
293#[doc = "PID1 (r) register accessor: Peripheral Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`pid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid1`]
294module"]
295#[doc(alias = "PID1")]
296pub type Pid1 = crate::Reg<pid1::Pid1Spec>;
297#[doc = "Peripheral Identification 1"]
298pub mod pid1;
299#[doc = "PID2 (r) register accessor: Peripheral Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`pid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid2`]
300module"]
301#[doc(alias = "PID2")]
302pub type Pid2 = crate::Reg<pid2::Pid2Spec>;
303#[doc = "Peripheral Identification 2"]
304pub mod pid2;
305#[doc = "PID3 (r) register accessor: Peripheral Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`pid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid3`]
306module"]
307#[doc(alias = "PID3")]
308pub type Pid3 = crate::Reg<pid3::Pid3Spec>;
309#[doc = "Peripheral Identification 3"]
310pub mod pid3;
311#[doc = "CID0 (r) register accessor: Component Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid0`]
312module"]
313#[doc(alias = "CID0")]
314pub type Cid0 = crate::Reg<cid0::Cid0Spec>;
315#[doc = "Component Identification 0"]
316pub mod cid0;
317#[doc = "CID1 (r) register accessor: Component Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`cid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid1`]
318module"]
319#[doc(alias = "CID1")]
320pub type Cid1 = crate::Reg<cid1::Cid1Spec>;
321#[doc = "Component Identification 1"]
322pub mod cid1;
323#[doc = "CID2 (r) register accessor: Component Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`cid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid2`]
324module"]
325#[doc(alias = "CID2")]
326pub type Cid2 = crate::Reg<cid2::Cid2Spec>;
327#[doc = "Component Identification 2"]
328pub mod cid2;
329#[doc = "CID3 (r) register accessor: Component Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`cid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid3`]
330module"]
331#[doc(alias = "CID3")]
332pub type Cid3 = crate::Reg<cid3::Cid3Spec>;
333#[doc = "Component Identification 3"]
334pub mod cid3;