1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Operating Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum Modeselect {
17 #[doc = "0: USART with external clock"]
18 UsartExtClk = 0,
19 #[doc = "1: USART with internal clock"]
20 UsartIntClk = 1,
21 #[doc = "2: SPI in slave operation"]
22 SpiSlave = 2,
23 #[doc = "3: SPI in master operation"]
24 SpiMaster = 3,
25 #[doc = "4: I2C slave operation"]
26 I2cSlave = 4,
27 #[doc = "5: I2C master operation"]
28 I2cMaster = 5,
29}
30impl From<Modeselect> for u8 {
31 #[inline(always)]
32 fn from(variant: Modeselect) -> Self {
33 variant as _
34 }
35}
36impl crate::FieldSpec for Modeselect {
37 type Ux = u8;
38}
39impl crate::IsEnum for Modeselect {}
40#[doc = "Field `MODE` reader - Operating Mode"]
41pub type ModeR = crate::FieldReader<Modeselect>;
42impl ModeR {
43 #[doc = "Get enumerated values variant"]
44 #[inline(always)]
45 pub const fn variant(&self) -> Option<Modeselect> {
46 match self.bits {
47 0 => Some(Modeselect::UsartExtClk),
48 1 => Some(Modeselect::UsartIntClk),
49 2 => Some(Modeselect::SpiSlave),
50 3 => Some(Modeselect::SpiMaster),
51 4 => Some(Modeselect::I2cSlave),
52 5 => Some(Modeselect::I2cMaster),
53 _ => None,
54 }
55 }
56 #[doc = "USART with external clock"]
57 #[inline(always)]
58 pub fn is_usart_ext_clk(&self) -> bool {
59 *self == Modeselect::UsartExtClk
60 }
61 #[doc = "USART with internal clock"]
62 #[inline(always)]
63 pub fn is_usart_int_clk(&self) -> bool {
64 *self == Modeselect::UsartIntClk
65 }
66 #[doc = "SPI in slave operation"]
67 #[inline(always)]
68 pub fn is_spi_slave(&self) -> bool {
69 *self == Modeselect::SpiSlave
70 }
71 #[doc = "SPI in master operation"]
72 #[inline(always)]
73 pub fn is_spi_master(&self) -> bool {
74 *self == Modeselect::SpiMaster
75 }
76 #[doc = "I2C slave operation"]
77 #[inline(always)]
78 pub fn is_i2c_slave(&self) -> bool {
79 *self == Modeselect::I2cSlave
80 }
81 #[doc = "I2C master operation"]
82 #[inline(always)]
83 pub fn is_i2c_master(&self) -> bool {
84 *self == Modeselect::I2cMaster
85 }
86}
87#[doc = "Field `MODE` writer - Operating Mode"]
88pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Modeselect>;
89impl<'a, REG> ModeW<'a, REG>
90where
91 REG: crate::Writable + crate::RegisterSpec,
92 REG::Ux: From<u8>,
93{
94 #[doc = "USART with external clock"]
95 #[inline(always)]
96 pub fn usart_ext_clk(self) -> &'a mut crate::W<REG> {
97 self.variant(Modeselect::UsartExtClk)
98 }
99 #[doc = "USART with internal clock"]
100 #[inline(always)]
101 pub fn usart_int_clk(self) -> &'a mut crate::W<REG> {
102 self.variant(Modeselect::UsartIntClk)
103 }
104 #[doc = "SPI in slave operation"]
105 #[inline(always)]
106 pub fn spi_slave(self) -> &'a mut crate::W<REG> {
107 self.variant(Modeselect::SpiSlave)
108 }
109 #[doc = "SPI in master operation"]
110 #[inline(always)]
111 pub fn spi_master(self) -> &'a mut crate::W<REG> {
112 self.variant(Modeselect::SpiMaster)
113 }
114 #[doc = "I2C slave operation"]
115 #[inline(always)]
116 pub fn i2c_slave(self) -> &'a mut crate::W<REG> {
117 self.variant(Modeselect::I2cSlave)
118 }
119 #[doc = "I2C master operation"]
120 #[inline(always)]
121 pub fn i2c_master(self) -> &'a mut crate::W<REG> {
122 self.variant(Modeselect::I2cMaster)
123 }
124}
125#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
126pub type RunstdbyR = crate::BitReader;
127#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
128pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
129#[doc = "Field `IBON` reader - Immediate Buffer Overflow Notification"]
130pub type IbonR = crate::BitReader;
131#[doc = "Field `IBON` writer - Immediate Buffer Overflow Notification"]
132pub type IbonW<'a, REG> = crate::BitWriter<'a, REG>;
133#[doc = "Data Out Pinout\n\nValue on reset: 0"]
134#[derive(Clone, Copy, Debug, PartialEq, Eq)]
135#[repr(u8)]
136pub enum Doposelect {
137 #[doc = "0: DO on PAD\\[0\\], SCK on PAD\\[1\\]
138and SS on PAD\\[2\\]"]
139 Pad0 = 0,
140 #[doc = "2: DO on PAD\\[3\\], SCK on PAD\\[1\\]
141and SS on PAD\\[2\\]"]
142 Pad2 = 2,
143}
144impl From<Doposelect> for u8 {
145 #[inline(always)]
146 fn from(variant: Doposelect) -> Self {
147 variant as _
148 }
149}
150impl crate::FieldSpec for Doposelect {
151 type Ux = u8;
152}
153impl crate::IsEnum for Doposelect {}
154#[doc = "Field `DOPO` reader - Data Out Pinout"]
155pub type DopoR = crate::FieldReader<Doposelect>;
156impl DopoR {
157 #[doc = "Get enumerated values variant"]
158 #[inline(always)]
159 pub const fn variant(&self) -> Option<Doposelect> {
160 match self.bits {
161 0 => Some(Doposelect::Pad0),
162 2 => Some(Doposelect::Pad2),
163 _ => None,
164 }
165 }
166 #[doc = "DO on PAD\\[0\\], SCK on PAD\\[1\\]
167and SS on PAD\\[2\\]"]
168 #[inline(always)]
169 pub fn is_pad0(&self) -> bool {
170 *self == Doposelect::Pad0
171 }
172 #[doc = "DO on PAD\\[3\\], SCK on PAD\\[1\\]
173and SS on PAD\\[2\\]"]
174 #[inline(always)]
175 pub fn is_pad2(&self) -> bool {
176 *self == Doposelect::Pad2
177 }
178}
179#[doc = "Field `DOPO` writer - Data Out Pinout"]
180pub type DopoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Doposelect>;
181impl<'a, REG> DopoW<'a, REG>
182where
183 REG: crate::Writable + crate::RegisterSpec,
184 REG::Ux: From<u8>,
185{
186 #[doc = "DO on PAD\\[0\\], SCK on PAD\\[1\\]
187and SS on PAD\\[2\\]"]
188 #[inline(always)]
189 pub fn pad0(self) -> &'a mut crate::W<REG> {
190 self.variant(Doposelect::Pad0)
191 }
192 #[doc = "DO on PAD\\[3\\], SCK on PAD\\[1\\]
193and SS on PAD\\[2\\]"]
194 #[inline(always)]
195 pub fn pad2(self) -> &'a mut crate::W<REG> {
196 self.variant(Doposelect::Pad2)
197 }
198}
199#[doc = "Data In Pinout\n\nValue on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201#[repr(u8)]
202pub enum Diposelect {
203 #[doc = "0: SERCOM PAD\\[0\\]
204is used as data input"]
205 Pad0 = 0,
206 #[doc = "1: SERCOM PAD\\[1\\]
207is used as data input"]
208 Pad1 = 1,
209 #[doc = "2: SERCOM PAD\\[2\\]
210is used as data input"]
211 Pad2 = 2,
212 #[doc = "3: SERCOM PAD\\[3\\]
213is used as data input"]
214 Pad3 = 3,
215}
216impl From<Diposelect> for u8 {
217 #[inline(always)]
218 fn from(variant: Diposelect) -> Self {
219 variant as _
220 }
221}
222impl crate::FieldSpec for Diposelect {
223 type Ux = u8;
224}
225impl crate::IsEnum for Diposelect {}
226#[doc = "Field `DIPO` reader - Data In Pinout"]
227pub type DipoR = crate::FieldReader<Diposelect>;
228impl DipoR {
229 #[doc = "Get enumerated values variant"]
230 #[inline(always)]
231 pub const fn variant(&self) -> Diposelect {
232 match self.bits {
233 0 => Diposelect::Pad0,
234 1 => Diposelect::Pad1,
235 2 => Diposelect::Pad2,
236 3 => Diposelect::Pad3,
237 _ => unreachable!(),
238 }
239 }
240 #[doc = "SERCOM PAD\\[0\\]
241is used as data input"]
242 #[inline(always)]
243 pub fn is_pad0(&self) -> bool {
244 *self == Diposelect::Pad0
245 }
246 #[doc = "SERCOM PAD\\[1\\]
247is used as data input"]
248 #[inline(always)]
249 pub fn is_pad1(&self) -> bool {
250 *self == Diposelect::Pad1
251 }
252 #[doc = "SERCOM PAD\\[2\\]
253is used as data input"]
254 #[inline(always)]
255 pub fn is_pad2(&self) -> bool {
256 *self == Diposelect::Pad2
257 }
258 #[doc = "SERCOM PAD\\[3\\]
259is used as data input"]
260 #[inline(always)]
261 pub fn is_pad3(&self) -> bool {
262 *self == Diposelect::Pad3
263 }
264}
265#[doc = "Field `DIPO` writer - Data In Pinout"]
266pub type DipoW<'a, REG> = crate::FieldWriter<'a, REG, 2, Diposelect, crate::Safe>;
267impl<'a, REG> DipoW<'a, REG>
268where
269 REG: crate::Writable + crate::RegisterSpec,
270 REG::Ux: From<u8>,
271{
272 #[doc = "SERCOM PAD\\[0\\]
273is used as data input"]
274 #[inline(always)]
275 pub fn pad0(self) -> &'a mut crate::W<REG> {
276 self.variant(Diposelect::Pad0)
277 }
278 #[doc = "SERCOM PAD\\[1\\]
279is used as data input"]
280 #[inline(always)]
281 pub fn pad1(self) -> &'a mut crate::W<REG> {
282 self.variant(Diposelect::Pad1)
283 }
284 #[doc = "SERCOM PAD\\[2\\]
285is used as data input"]
286 #[inline(always)]
287 pub fn pad2(self) -> &'a mut crate::W<REG> {
288 self.variant(Diposelect::Pad2)
289 }
290 #[doc = "SERCOM PAD\\[3\\]
291is used as data input"]
292 #[inline(always)]
293 pub fn pad3(self) -> &'a mut crate::W<REG> {
294 self.variant(Diposelect::Pad3)
295 }
296}
297#[doc = "Frame Format\n\nValue on reset: 0"]
298#[derive(Clone, Copy, Debug, PartialEq, Eq)]
299#[repr(u8)]
300pub enum Formselect {
301 #[doc = "0: SPI Frame"]
302 SpiFrame = 0,
303 #[doc = "2: SPI Frame with Addr"]
304 SpiFrameWithAddr = 2,
305}
306impl From<Formselect> for u8 {
307 #[inline(always)]
308 fn from(variant: Formselect) -> Self {
309 variant as _
310 }
311}
312impl crate::FieldSpec for Formselect {
313 type Ux = u8;
314}
315impl crate::IsEnum for Formselect {}
316#[doc = "Field `FORM` reader - Frame Format"]
317pub type FormR = crate::FieldReader<Formselect>;
318impl FormR {
319 #[doc = "Get enumerated values variant"]
320 #[inline(always)]
321 pub const fn variant(&self) -> Option<Formselect> {
322 match self.bits {
323 0 => Some(Formselect::SpiFrame),
324 2 => Some(Formselect::SpiFrameWithAddr),
325 _ => None,
326 }
327 }
328 #[doc = "SPI Frame"]
329 #[inline(always)]
330 pub fn is_spi_frame(&self) -> bool {
331 *self == Formselect::SpiFrame
332 }
333 #[doc = "SPI Frame with Addr"]
334 #[inline(always)]
335 pub fn is_spi_frame_with_addr(&self) -> bool {
336 *self == Formselect::SpiFrameWithAddr
337 }
338}
339#[doc = "Field `FORM` writer - Frame Format"]
340pub type FormW<'a, REG> = crate::FieldWriter<'a, REG, 4, Formselect>;
341impl<'a, REG> FormW<'a, REG>
342where
343 REG: crate::Writable + crate::RegisterSpec,
344 REG::Ux: From<u8>,
345{
346 #[doc = "SPI Frame"]
347 #[inline(always)]
348 pub fn spi_frame(self) -> &'a mut crate::W<REG> {
349 self.variant(Formselect::SpiFrame)
350 }
351 #[doc = "SPI Frame with Addr"]
352 #[inline(always)]
353 pub fn spi_frame_with_addr(self) -> &'a mut crate::W<REG> {
354 self.variant(Formselect::SpiFrameWithAddr)
355 }
356}
357#[doc = "Clock Phase\n\nValue on reset: 0"]
358#[derive(Clone, Copy, Debug, PartialEq, Eq)]
359pub enum Cphaselect {
360 #[doc = "0: The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
361 LeadingEdge = 0,
362 #[doc = "1: The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
363 TrailingEdge = 1,
364}
365impl From<Cphaselect> for bool {
366 #[inline(always)]
367 fn from(variant: Cphaselect) -> Self {
368 variant as u8 != 0
369 }
370}
371#[doc = "Field `CPHA` reader - Clock Phase"]
372pub type CphaR = crate::BitReader<Cphaselect>;
373impl CphaR {
374 #[doc = "Get enumerated values variant"]
375 #[inline(always)]
376 pub const fn variant(&self) -> Cphaselect {
377 match self.bits {
378 false => Cphaselect::LeadingEdge,
379 true => Cphaselect::TrailingEdge,
380 }
381 }
382 #[doc = "The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
383 #[inline(always)]
384 pub fn is_leading_edge(&self) -> bool {
385 *self == Cphaselect::LeadingEdge
386 }
387 #[doc = "The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
388 #[inline(always)]
389 pub fn is_trailing_edge(&self) -> bool {
390 *self == Cphaselect::TrailingEdge
391 }
392}
393#[doc = "Field `CPHA` writer - Clock Phase"]
394pub type CphaW<'a, REG> = crate::BitWriter<'a, REG, Cphaselect>;
395impl<'a, REG> CphaW<'a, REG>
396where
397 REG: crate::Writable + crate::RegisterSpec,
398{
399 #[doc = "The data is sampled on a leading SCK edge and changed on a trailing SCK edge"]
400 #[inline(always)]
401 pub fn leading_edge(self) -> &'a mut crate::W<REG> {
402 self.variant(Cphaselect::LeadingEdge)
403 }
404 #[doc = "The data is sampled on a trailing SCK edge and changed on a leading SCK edge"]
405 #[inline(always)]
406 pub fn trailing_edge(self) -> &'a mut crate::W<REG> {
407 self.variant(Cphaselect::TrailingEdge)
408 }
409}
410#[doc = "Clock Polarity\n\nValue on reset: 0"]
411#[derive(Clone, Copy, Debug, PartialEq, Eq)]
412pub enum Cpolselect {
413 #[doc = "0: SCK is low when idle"]
414 IdleLow = 0,
415 #[doc = "1: SCK is high when idle"]
416 IdleHigh = 1,
417}
418impl From<Cpolselect> for bool {
419 #[inline(always)]
420 fn from(variant: Cpolselect) -> Self {
421 variant as u8 != 0
422 }
423}
424#[doc = "Field `CPOL` reader - Clock Polarity"]
425pub type CpolR = crate::BitReader<Cpolselect>;
426impl CpolR {
427 #[doc = "Get enumerated values variant"]
428 #[inline(always)]
429 pub const fn variant(&self) -> Cpolselect {
430 match self.bits {
431 false => Cpolselect::IdleLow,
432 true => Cpolselect::IdleHigh,
433 }
434 }
435 #[doc = "SCK is low when idle"]
436 #[inline(always)]
437 pub fn is_idle_low(&self) -> bool {
438 *self == Cpolselect::IdleLow
439 }
440 #[doc = "SCK is high when idle"]
441 #[inline(always)]
442 pub fn is_idle_high(&self) -> bool {
443 *self == Cpolselect::IdleHigh
444 }
445}
446#[doc = "Field `CPOL` writer - Clock Polarity"]
447pub type CpolW<'a, REG> = crate::BitWriter<'a, REG, Cpolselect>;
448impl<'a, REG> CpolW<'a, REG>
449where
450 REG: crate::Writable + crate::RegisterSpec,
451{
452 #[doc = "SCK is low when idle"]
453 #[inline(always)]
454 pub fn idle_low(self) -> &'a mut crate::W<REG> {
455 self.variant(Cpolselect::IdleLow)
456 }
457 #[doc = "SCK is high when idle"]
458 #[inline(always)]
459 pub fn idle_high(self) -> &'a mut crate::W<REG> {
460 self.variant(Cpolselect::IdleHigh)
461 }
462}
463#[doc = "Data Order\n\nValue on reset: 0"]
464#[derive(Clone, Copy, Debug, PartialEq, Eq)]
465pub enum Dordselect {
466 #[doc = "0: MSB is transferred first"]
467 Msb = 0,
468 #[doc = "1: LSB is transferred first"]
469 Lsb = 1,
470}
471impl From<Dordselect> for bool {
472 #[inline(always)]
473 fn from(variant: Dordselect) -> Self {
474 variant as u8 != 0
475 }
476}
477#[doc = "Field `DORD` reader - Data Order"]
478pub type DordR = crate::BitReader<Dordselect>;
479impl DordR {
480 #[doc = "Get enumerated values variant"]
481 #[inline(always)]
482 pub const fn variant(&self) -> Dordselect {
483 match self.bits {
484 false => Dordselect::Msb,
485 true => Dordselect::Lsb,
486 }
487 }
488 #[doc = "MSB is transferred first"]
489 #[inline(always)]
490 pub fn is_msb(&self) -> bool {
491 *self == Dordselect::Msb
492 }
493 #[doc = "LSB is transferred first"]
494 #[inline(always)]
495 pub fn is_lsb(&self) -> bool {
496 *self == Dordselect::Lsb
497 }
498}
499#[doc = "Field `DORD` writer - Data Order"]
500pub type DordW<'a, REG> = crate::BitWriter<'a, REG, Dordselect>;
501impl<'a, REG> DordW<'a, REG>
502where
503 REG: crate::Writable + crate::RegisterSpec,
504{
505 #[doc = "MSB is transferred first"]
506 #[inline(always)]
507 pub fn msb(self) -> &'a mut crate::W<REG> {
508 self.variant(Dordselect::Msb)
509 }
510 #[doc = "LSB is transferred first"]
511 #[inline(always)]
512 pub fn lsb(self) -> &'a mut crate::W<REG> {
513 self.variant(Dordselect::Lsb)
514 }
515}
516impl R {
517 #[doc = "Bit 0 - Software Reset"]
518 #[inline(always)]
519 pub fn swrst(&self) -> SwrstR {
520 SwrstR::new((self.bits & 1) != 0)
521 }
522 #[doc = "Bit 1 - Enable"]
523 #[inline(always)]
524 pub fn enable(&self) -> EnableR {
525 EnableR::new(((self.bits >> 1) & 1) != 0)
526 }
527 #[doc = "Bits 2:4 - Operating Mode"]
528 #[inline(always)]
529 pub fn mode(&self) -> ModeR {
530 ModeR::new(((self.bits >> 2) & 7) as u8)
531 }
532 #[doc = "Bit 7 - Run during Standby"]
533 #[inline(always)]
534 pub fn runstdby(&self) -> RunstdbyR {
535 RunstdbyR::new(((self.bits >> 7) & 1) != 0)
536 }
537 #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
538 #[inline(always)]
539 pub fn ibon(&self) -> IbonR {
540 IbonR::new(((self.bits >> 8) & 1) != 0)
541 }
542 #[doc = "Bits 16:17 - Data Out Pinout"]
543 #[inline(always)]
544 pub fn dopo(&self) -> DopoR {
545 DopoR::new(((self.bits >> 16) & 3) as u8)
546 }
547 #[doc = "Bits 20:21 - Data In Pinout"]
548 #[inline(always)]
549 pub fn dipo(&self) -> DipoR {
550 DipoR::new(((self.bits >> 20) & 3) as u8)
551 }
552 #[doc = "Bits 24:27 - Frame Format"]
553 #[inline(always)]
554 pub fn form(&self) -> FormR {
555 FormR::new(((self.bits >> 24) & 0x0f) as u8)
556 }
557 #[doc = "Bit 28 - Clock Phase"]
558 #[inline(always)]
559 pub fn cpha(&self) -> CphaR {
560 CphaR::new(((self.bits >> 28) & 1) != 0)
561 }
562 #[doc = "Bit 29 - Clock Polarity"]
563 #[inline(always)]
564 pub fn cpol(&self) -> CpolR {
565 CpolR::new(((self.bits >> 29) & 1) != 0)
566 }
567 #[doc = "Bit 30 - Data Order"]
568 #[inline(always)]
569 pub fn dord(&self) -> DordR {
570 DordR::new(((self.bits >> 30) & 1) != 0)
571 }
572}
573impl W {
574 #[doc = "Bit 0 - Software Reset"]
575 #[inline(always)]
576 #[must_use]
577 pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
578 SwrstW::new(self, 0)
579 }
580 #[doc = "Bit 1 - Enable"]
581 #[inline(always)]
582 #[must_use]
583 pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
584 EnableW::new(self, 1)
585 }
586 #[doc = "Bits 2:4 - Operating Mode"]
587 #[inline(always)]
588 #[must_use]
589 pub fn mode(&mut self) -> ModeW<CtrlaSpec> {
590 ModeW::new(self, 2)
591 }
592 #[doc = "Bit 7 - Run during Standby"]
593 #[inline(always)]
594 #[must_use]
595 pub fn runstdby(&mut self) -> RunstdbyW<CtrlaSpec> {
596 RunstdbyW::new(self, 7)
597 }
598 #[doc = "Bit 8 - Immediate Buffer Overflow Notification"]
599 #[inline(always)]
600 #[must_use]
601 pub fn ibon(&mut self) -> IbonW<CtrlaSpec> {
602 IbonW::new(self, 8)
603 }
604 #[doc = "Bits 16:17 - Data Out Pinout"]
605 #[inline(always)]
606 #[must_use]
607 pub fn dopo(&mut self) -> DopoW<CtrlaSpec> {
608 DopoW::new(self, 16)
609 }
610 #[doc = "Bits 20:21 - Data In Pinout"]
611 #[inline(always)]
612 #[must_use]
613 pub fn dipo(&mut self) -> DipoW<CtrlaSpec> {
614 DipoW::new(self, 20)
615 }
616 #[doc = "Bits 24:27 - Frame Format"]
617 #[inline(always)]
618 #[must_use]
619 pub fn form(&mut self) -> FormW<CtrlaSpec> {
620 FormW::new(self, 24)
621 }
622 #[doc = "Bit 28 - Clock Phase"]
623 #[inline(always)]
624 #[must_use]
625 pub fn cpha(&mut self) -> CphaW<CtrlaSpec> {
626 CphaW::new(self, 28)
627 }
628 #[doc = "Bit 29 - Clock Polarity"]
629 #[inline(always)]
630 #[must_use]
631 pub fn cpol(&mut self) -> CpolW<CtrlaSpec> {
632 CpolW::new(self, 29)
633 }
634 #[doc = "Bit 30 - Data Order"]
635 #[inline(always)]
636 #[must_use]
637 pub fn dord(&mut self) -> DordW<CtrlaSpec> {
638 DordW::new(self, 30)
639 }
640}
641#[doc = "SPIM Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
642pub struct CtrlaSpec;
643impl crate::RegisterSpec for CtrlaSpec {
644 type Ux = u32;
645}
646#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
647impl crate::Readable for CtrlaSpec {}
648#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
649impl crate::Writable for CtrlaSpec {
650 type Safety = crate::Unsafe;
651 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
652 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
653}
654#[doc = "`reset()` method sets CTRLA to value 0"]
655impl crate::Resettable for CtrlaSpec {
656 const RESET_VALUE: u32 = 0;
657}