atsamd51n/pac/
intflagb.rs1#[doc = "Register `INTFLAGB` reader"]
2pub type R = crate::R<IntflagbSpec>;
3#[doc = "Register `INTFLAGB` writer"]
4pub type W = crate::W<IntflagbSpec>;
5#[doc = "Field `USB_` reader - USB"]
6pub type Usb_R = crate::BitReader;
7#[doc = "Field `USB_` writer - USB"]
8pub type Usb_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DSU_` reader - DSU"]
10pub type Dsu_R = crate::BitReader;
11#[doc = "Field `DSU_` writer - DSU"]
12pub type Dsu_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `NVMCTRL_` reader - NVMCTRL"]
14pub type Nvmctrl_R = crate::BitReader;
15#[doc = "Field `NVMCTRL_` writer - NVMCTRL"]
16pub type Nvmctrl_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CMCC_` reader - CMCC"]
18pub type Cmcc_R = crate::BitReader;
19#[doc = "Field `CMCC_` writer - CMCC"]
20pub type Cmcc_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PORT_` reader - PORT"]
22pub type Port_R = crate::BitReader;
23#[doc = "Field `PORT_` writer - PORT"]
24pub type Port_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `DMAC_` reader - DMAC"]
26pub type Dmac_R = crate::BitReader;
27#[doc = "Field `DMAC_` writer - DMAC"]
28pub type Dmac_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `EVSYS_` reader - EVSYS"]
30pub type Evsys_R = crate::BitReader;
31#[doc = "Field `EVSYS_` writer - EVSYS"]
32pub type Evsys_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SERCOM2_` reader - SERCOM2"]
34pub type Sercom2_R = crate::BitReader;
35#[doc = "Field `SERCOM2_` writer - SERCOM2"]
36pub type Sercom2_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `SERCOM3_` reader - SERCOM3"]
38pub type Sercom3_R = crate::BitReader;
39#[doc = "Field `SERCOM3_` writer - SERCOM3"]
40pub type Sercom3_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `TCC0_` reader - TCC0"]
42pub type Tcc0_R = crate::BitReader;
43#[doc = "Field `TCC0_` writer - TCC0"]
44pub type Tcc0_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `TCC1_` reader - TCC1"]
46pub type Tcc1_R = crate::BitReader;
47#[doc = "Field `TCC1_` writer - TCC1"]
48pub type Tcc1_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `TC2_` reader - TC2"]
50pub type Tc2_R = crate::BitReader;
51#[doc = "Field `TC2_` writer - TC2"]
52pub type Tc2_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `TC3_` reader - TC3"]
54pub type Tc3_R = crate::BitReader;
55#[doc = "Field `TC3_` writer - TC3"]
56pub type Tc3_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `RAMECC_` reader - RAMECC"]
58pub type Ramecc_R = crate::BitReader;
59#[doc = "Field `RAMECC_` writer - RAMECC"]
60pub type Ramecc_W<'a, REG> = crate::BitWriter<'a, REG>;
61impl R {
62 #[doc = "Bit 0 - USB"]
63 #[inline(always)]
64 pub fn usb_(&self) -> Usb_R {
65 Usb_R::new((self.bits & 1) != 0)
66 }
67 #[doc = "Bit 1 - DSU"]
68 #[inline(always)]
69 pub fn dsu_(&self) -> Dsu_R {
70 Dsu_R::new(((self.bits >> 1) & 1) != 0)
71 }
72 #[doc = "Bit 2 - NVMCTRL"]
73 #[inline(always)]
74 pub fn nvmctrl_(&self) -> Nvmctrl_R {
75 Nvmctrl_R::new(((self.bits >> 2) & 1) != 0)
76 }
77 #[doc = "Bit 3 - CMCC"]
78 #[inline(always)]
79 pub fn cmcc_(&self) -> Cmcc_R {
80 Cmcc_R::new(((self.bits >> 3) & 1) != 0)
81 }
82 #[doc = "Bit 4 - PORT"]
83 #[inline(always)]
84 pub fn port_(&self) -> Port_R {
85 Port_R::new(((self.bits >> 4) & 1) != 0)
86 }
87 #[doc = "Bit 5 - DMAC"]
88 #[inline(always)]
89 pub fn dmac_(&self) -> Dmac_R {
90 Dmac_R::new(((self.bits >> 5) & 1) != 0)
91 }
92 #[doc = "Bit 7 - EVSYS"]
93 #[inline(always)]
94 pub fn evsys_(&self) -> Evsys_R {
95 Evsys_R::new(((self.bits >> 7) & 1) != 0)
96 }
97 #[doc = "Bit 9 - SERCOM2"]
98 #[inline(always)]
99 pub fn sercom2_(&self) -> Sercom2_R {
100 Sercom2_R::new(((self.bits >> 9) & 1) != 0)
101 }
102 #[doc = "Bit 10 - SERCOM3"]
103 #[inline(always)]
104 pub fn sercom3_(&self) -> Sercom3_R {
105 Sercom3_R::new(((self.bits >> 10) & 1) != 0)
106 }
107 #[doc = "Bit 11 - TCC0"]
108 #[inline(always)]
109 pub fn tcc0_(&self) -> Tcc0_R {
110 Tcc0_R::new(((self.bits >> 11) & 1) != 0)
111 }
112 #[doc = "Bit 12 - TCC1"]
113 #[inline(always)]
114 pub fn tcc1_(&self) -> Tcc1_R {
115 Tcc1_R::new(((self.bits >> 12) & 1) != 0)
116 }
117 #[doc = "Bit 13 - TC2"]
118 #[inline(always)]
119 pub fn tc2_(&self) -> Tc2_R {
120 Tc2_R::new(((self.bits >> 13) & 1) != 0)
121 }
122 #[doc = "Bit 14 - TC3"]
123 #[inline(always)]
124 pub fn tc3_(&self) -> Tc3_R {
125 Tc3_R::new(((self.bits >> 14) & 1) != 0)
126 }
127 #[doc = "Bit 16 - RAMECC"]
128 #[inline(always)]
129 pub fn ramecc_(&self) -> Ramecc_R {
130 Ramecc_R::new(((self.bits >> 16) & 1) != 0)
131 }
132}
133impl W {
134 #[doc = "Bit 0 - USB"]
135 #[inline(always)]
136 #[must_use]
137 pub fn usb_(&mut self) -> Usb_W<IntflagbSpec> {
138 Usb_W::new(self, 0)
139 }
140 #[doc = "Bit 1 - DSU"]
141 #[inline(always)]
142 #[must_use]
143 pub fn dsu_(&mut self) -> Dsu_W<IntflagbSpec> {
144 Dsu_W::new(self, 1)
145 }
146 #[doc = "Bit 2 - NVMCTRL"]
147 #[inline(always)]
148 #[must_use]
149 pub fn nvmctrl_(&mut self) -> Nvmctrl_W<IntflagbSpec> {
150 Nvmctrl_W::new(self, 2)
151 }
152 #[doc = "Bit 3 - CMCC"]
153 #[inline(always)]
154 #[must_use]
155 pub fn cmcc_(&mut self) -> Cmcc_W<IntflagbSpec> {
156 Cmcc_W::new(self, 3)
157 }
158 #[doc = "Bit 4 - PORT"]
159 #[inline(always)]
160 #[must_use]
161 pub fn port_(&mut self) -> Port_W<IntflagbSpec> {
162 Port_W::new(self, 4)
163 }
164 #[doc = "Bit 5 - DMAC"]
165 #[inline(always)]
166 #[must_use]
167 pub fn dmac_(&mut self) -> Dmac_W<IntflagbSpec> {
168 Dmac_W::new(self, 5)
169 }
170 #[doc = "Bit 7 - EVSYS"]
171 #[inline(always)]
172 #[must_use]
173 pub fn evsys_(&mut self) -> Evsys_W<IntflagbSpec> {
174 Evsys_W::new(self, 7)
175 }
176 #[doc = "Bit 9 - SERCOM2"]
177 #[inline(always)]
178 #[must_use]
179 pub fn sercom2_(&mut self) -> Sercom2_W<IntflagbSpec> {
180 Sercom2_W::new(self, 9)
181 }
182 #[doc = "Bit 10 - SERCOM3"]
183 #[inline(always)]
184 #[must_use]
185 pub fn sercom3_(&mut self) -> Sercom3_W<IntflagbSpec> {
186 Sercom3_W::new(self, 10)
187 }
188 #[doc = "Bit 11 - TCC0"]
189 #[inline(always)]
190 #[must_use]
191 pub fn tcc0_(&mut self) -> Tcc0_W<IntflagbSpec> {
192 Tcc0_W::new(self, 11)
193 }
194 #[doc = "Bit 12 - TCC1"]
195 #[inline(always)]
196 #[must_use]
197 pub fn tcc1_(&mut self) -> Tcc1_W<IntflagbSpec> {
198 Tcc1_W::new(self, 12)
199 }
200 #[doc = "Bit 13 - TC2"]
201 #[inline(always)]
202 #[must_use]
203 pub fn tc2_(&mut self) -> Tc2_W<IntflagbSpec> {
204 Tc2_W::new(self, 13)
205 }
206 #[doc = "Bit 14 - TC3"]
207 #[inline(always)]
208 #[must_use]
209 pub fn tc3_(&mut self) -> Tc3_W<IntflagbSpec> {
210 Tc3_W::new(self, 14)
211 }
212 #[doc = "Bit 16 - RAMECC"]
213 #[inline(always)]
214 #[must_use]
215 pub fn ramecc_(&mut self) -> Ramecc_W<IntflagbSpec> {
216 Ramecc_W::new(self, 16)
217 }
218}
219#[doc = "Peripheral interrupt flag status - Bridge B\n\nYou can [`read`](crate::Reg::read) this register and get [`intflagb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intflagb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
220pub struct IntflagbSpec;
221impl crate::RegisterSpec for IntflagbSpec {
222 type Ux = u32;
223}
224#[doc = "`read()` method returns [`intflagb::R`](R) reader structure"]
225impl crate::Readable for IntflagbSpec {}
226#[doc = "`write(|w| ..)` method takes [`intflagb::W`](W) writer structure"]
227impl crate::Writable for IntflagbSpec {
228 type Safety = crate::Unsafe;
229 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
230 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
231}
232#[doc = "`reset()` method sets INTFLAGB to value 0"]
233impl crate::Resettable for IntflagbSpec {
234 const RESET_VALUE: u32 = 0;
235}