atsamd51n/i2s/
txctrl.rs

1#[doc = "Register `TXCTRL` reader"]
2pub type R = crate::R<TxctrlSpec>;
3#[doc = "Register `TXCTRL` writer"]
4pub type W = crate::W<TxctrlSpec>;
5#[doc = "Line Default Line when Slot Disabled\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Txdefaultselect {
9    #[doc = "0: Output Default Value is 0"]
10    Zero = 0,
11    #[doc = "1: Output Default Value is 1"]
12    One = 1,
13    #[doc = "3: Output Default Value is high impedance"]
14    Hiz = 3,
15}
16impl From<Txdefaultselect> for u8 {
17    #[inline(always)]
18    fn from(variant: Txdefaultselect) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for Txdefaultselect {
23    type Ux = u8;
24}
25impl crate::IsEnum for Txdefaultselect {}
26#[doc = "Field `TXDEFAULT` reader - Line Default Line when Slot Disabled"]
27pub type TxdefaultR = crate::FieldReader<Txdefaultselect>;
28impl TxdefaultR {
29    #[doc = "Get enumerated values variant"]
30    #[inline(always)]
31    pub const fn variant(&self) -> Option<Txdefaultselect> {
32        match self.bits {
33            0 => Some(Txdefaultselect::Zero),
34            1 => Some(Txdefaultselect::One),
35            3 => Some(Txdefaultselect::Hiz),
36            _ => None,
37        }
38    }
39    #[doc = "Output Default Value is 0"]
40    #[inline(always)]
41    pub fn is_zero(&self) -> bool {
42        *self == Txdefaultselect::Zero
43    }
44    #[doc = "Output Default Value is 1"]
45    #[inline(always)]
46    pub fn is_one(&self) -> bool {
47        *self == Txdefaultselect::One
48    }
49    #[doc = "Output Default Value is high impedance"]
50    #[inline(always)]
51    pub fn is_hiz(&self) -> bool {
52        *self == Txdefaultselect::Hiz
53    }
54}
55#[doc = "Field `TXDEFAULT` writer - Line Default Line when Slot Disabled"]
56pub type TxdefaultW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdefaultselect>;
57impl<'a, REG> TxdefaultW<'a, REG>
58where
59    REG: crate::Writable + crate::RegisterSpec,
60    REG::Ux: From<u8>,
61{
62    #[doc = "Output Default Value is 0"]
63    #[inline(always)]
64    pub fn zero(self) -> &'a mut crate::W<REG> {
65        self.variant(Txdefaultselect::Zero)
66    }
67    #[doc = "Output Default Value is 1"]
68    #[inline(always)]
69    pub fn one(self) -> &'a mut crate::W<REG> {
70        self.variant(Txdefaultselect::One)
71    }
72    #[doc = "Output Default Value is high impedance"]
73    #[inline(always)]
74    pub fn hiz(self) -> &'a mut crate::W<REG> {
75        self.variant(Txdefaultselect::Hiz)
76    }
77}
78#[doc = "Transmit Data when Underrun\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80pub enum Txsameselect {
81    #[doc = "0: Zero data transmitted in case of underrun"]
82    Zero = 0,
83    #[doc = "1: Last data transmitted in case of underrun"]
84    Same = 1,
85}
86impl From<Txsameselect> for bool {
87    #[inline(always)]
88    fn from(variant: Txsameselect) -> Self {
89        variant as u8 != 0
90    }
91}
92#[doc = "Field `TXSAME` reader - Transmit Data when Underrun"]
93pub type TxsameR = crate::BitReader<Txsameselect>;
94impl TxsameR {
95    #[doc = "Get enumerated values variant"]
96    #[inline(always)]
97    pub const fn variant(&self) -> Txsameselect {
98        match self.bits {
99            false => Txsameselect::Zero,
100            true => Txsameselect::Same,
101        }
102    }
103    #[doc = "Zero data transmitted in case of underrun"]
104    #[inline(always)]
105    pub fn is_zero(&self) -> bool {
106        *self == Txsameselect::Zero
107    }
108    #[doc = "Last data transmitted in case of underrun"]
109    #[inline(always)]
110    pub fn is_same(&self) -> bool {
111        *self == Txsameselect::Same
112    }
113}
114#[doc = "Field `TXSAME` writer - Transmit Data when Underrun"]
115pub type TxsameW<'a, REG> = crate::BitWriter<'a, REG, Txsameselect>;
116impl<'a, REG> TxsameW<'a, REG>
117where
118    REG: crate::Writable + crate::RegisterSpec,
119{
120    #[doc = "Zero data transmitted in case of underrun"]
121    #[inline(always)]
122    pub fn zero(self) -> &'a mut crate::W<REG> {
123        self.variant(Txsameselect::Zero)
124    }
125    #[doc = "Last data transmitted in case of underrun"]
126    #[inline(always)]
127    pub fn same(self) -> &'a mut crate::W<REG> {
128        self.variant(Txsameselect::Same)
129    }
130}
131#[doc = "Data Slot Formatting Adjust\n\nValue on reset: 0"]
132#[derive(Clone, Copy, Debug, PartialEq, Eq)]
133pub enum Slotadjselect {
134    #[doc = "0: Data is right adjusted in slot"]
135    Right = 0,
136    #[doc = "1: Data is left adjusted in slot"]
137    Left = 1,
138}
139impl From<Slotadjselect> for bool {
140    #[inline(always)]
141    fn from(variant: Slotadjselect) -> Self {
142        variant as u8 != 0
143    }
144}
145#[doc = "Field `SLOTADJ` reader - Data Slot Formatting Adjust"]
146pub type SlotadjR = crate::BitReader<Slotadjselect>;
147impl SlotadjR {
148    #[doc = "Get enumerated values variant"]
149    #[inline(always)]
150    pub const fn variant(&self) -> Slotadjselect {
151        match self.bits {
152            false => Slotadjselect::Right,
153            true => Slotadjselect::Left,
154        }
155    }
156    #[doc = "Data is right adjusted in slot"]
157    #[inline(always)]
158    pub fn is_right(&self) -> bool {
159        *self == Slotadjselect::Right
160    }
161    #[doc = "Data is left adjusted in slot"]
162    #[inline(always)]
163    pub fn is_left(&self) -> bool {
164        *self == Slotadjselect::Left
165    }
166}
167#[doc = "Field `SLOTADJ` writer - Data Slot Formatting Adjust"]
168pub type SlotadjW<'a, REG> = crate::BitWriter<'a, REG, Slotadjselect>;
169impl<'a, REG> SlotadjW<'a, REG>
170where
171    REG: crate::Writable + crate::RegisterSpec,
172{
173    #[doc = "Data is right adjusted in slot"]
174    #[inline(always)]
175    pub fn right(self) -> &'a mut crate::W<REG> {
176        self.variant(Slotadjselect::Right)
177    }
178    #[doc = "Data is left adjusted in slot"]
179    #[inline(always)]
180    pub fn left(self) -> &'a mut crate::W<REG> {
181        self.variant(Slotadjselect::Left)
182    }
183}
184#[doc = "Data Word Size\n\nValue on reset: 0"]
185#[derive(Clone, Copy, Debug, PartialEq, Eq)]
186#[repr(u8)]
187pub enum Datasizeselect {
188    #[doc = "0: 32 bits"]
189    _32 = 0,
190    #[doc = "1: 24 bits"]
191    _24 = 1,
192    #[doc = "2: 20 bits"]
193    _20 = 2,
194    #[doc = "3: 18 bits"]
195    _18 = 3,
196    #[doc = "4: 16 bits"]
197    _16 = 4,
198    #[doc = "5: 16 bits compact stereo"]
199    _16c = 5,
200    #[doc = "6: 8 bits"]
201    _8 = 6,
202    #[doc = "7: 8 bits compact stereo"]
203    _8c = 7,
204}
205impl From<Datasizeselect> for u8 {
206    #[inline(always)]
207    fn from(variant: Datasizeselect) -> Self {
208        variant as _
209    }
210}
211impl crate::FieldSpec for Datasizeselect {
212    type Ux = u8;
213}
214impl crate::IsEnum for Datasizeselect {}
215#[doc = "Field `DATASIZE` reader - Data Word Size"]
216pub type DatasizeR = crate::FieldReader<Datasizeselect>;
217impl DatasizeR {
218    #[doc = "Get enumerated values variant"]
219    #[inline(always)]
220    pub const fn variant(&self) -> Datasizeselect {
221        match self.bits {
222            0 => Datasizeselect::_32,
223            1 => Datasizeselect::_24,
224            2 => Datasizeselect::_20,
225            3 => Datasizeselect::_18,
226            4 => Datasizeselect::_16,
227            5 => Datasizeselect::_16c,
228            6 => Datasizeselect::_8,
229            7 => Datasizeselect::_8c,
230            _ => unreachable!(),
231        }
232    }
233    #[doc = "32 bits"]
234    #[inline(always)]
235    pub fn is_32(&self) -> bool {
236        *self == Datasizeselect::_32
237    }
238    #[doc = "24 bits"]
239    #[inline(always)]
240    pub fn is_24(&self) -> bool {
241        *self == Datasizeselect::_24
242    }
243    #[doc = "20 bits"]
244    #[inline(always)]
245    pub fn is_20(&self) -> bool {
246        *self == Datasizeselect::_20
247    }
248    #[doc = "18 bits"]
249    #[inline(always)]
250    pub fn is_18(&self) -> bool {
251        *self == Datasizeselect::_18
252    }
253    #[doc = "16 bits"]
254    #[inline(always)]
255    pub fn is_16(&self) -> bool {
256        *self == Datasizeselect::_16
257    }
258    #[doc = "16 bits compact stereo"]
259    #[inline(always)]
260    pub fn is_16c(&self) -> bool {
261        *self == Datasizeselect::_16c
262    }
263    #[doc = "8 bits"]
264    #[inline(always)]
265    pub fn is_8(&self) -> bool {
266        *self == Datasizeselect::_8
267    }
268    #[doc = "8 bits compact stereo"]
269    #[inline(always)]
270    pub fn is_8c(&self) -> bool {
271        *self == Datasizeselect::_8c
272    }
273}
274#[doc = "Field `DATASIZE` writer - Data Word Size"]
275pub type DatasizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Datasizeselect, crate::Safe>;
276impl<'a, REG> DatasizeW<'a, REG>
277where
278    REG: crate::Writable + crate::RegisterSpec,
279    REG::Ux: From<u8>,
280{
281    #[doc = "32 bits"]
282    #[inline(always)]
283    pub fn _32(self) -> &'a mut crate::W<REG> {
284        self.variant(Datasizeselect::_32)
285    }
286    #[doc = "24 bits"]
287    #[inline(always)]
288    pub fn _24(self) -> &'a mut crate::W<REG> {
289        self.variant(Datasizeselect::_24)
290    }
291    #[doc = "20 bits"]
292    #[inline(always)]
293    pub fn _20(self) -> &'a mut crate::W<REG> {
294        self.variant(Datasizeselect::_20)
295    }
296    #[doc = "18 bits"]
297    #[inline(always)]
298    pub fn _18(self) -> &'a mut crate::W<REG> {
299        self.variant(Datasizeselect::_18)
300    }
301    #[doc = "16 bits"]
302    #[inline(always)]
303    pub fn _16(self) -> &'a mut crate::W<REG> {
304        self.variant(Datasizeselect::_16)
305    }
306    #[doc = "16 bits compact stereo"]
307    #[inline(always)]
308    pub fn _16c(self) -> &'a mut crate::W<REG> {
309        self.variant(Datasizeselect::_16c)
310    }
311    #[doc = "8 bits"]
312    #[inline(always)]
313    pub fn _8(self) -> &'a mut crate::W<REG> {
314        self.variant(Datasizeselect::_8)
315    }
316    #[doc = "8 bits compact stereo"]
317    #[inline(always)]
318    pub fn _8c(self) -> &'a mut crate::W<REG> {
319        self.variant(Datasizeselect::_8c)
320    }
321}
322#[doc = "Data Word Formatting Adjust\n\nValue on reset: 0"]
323#[derive(Clone, Copy, Debug, PartialEq, Eq)]
324pub enum Wordadjselect {
325    #[doc = "0: Data is right adjusted in word"]
326    Right = 0,
327    #[doc = "1: Data is left adjusted in word"]
328    Left = 1,
329}
330impl From<Wordadjselect> for bool {
331    #[inline(always)]
332    fn from(variant: Wordadjselect) -> Self {
333        variant as u8 != 0
334    }
335}
336#[doc = "Field `WORDADJ` reader - Data Word Formatting Adjust"]
337pub type WordadjR = crate::BitReader<Wordadjselect>;
338impl WordadjR {
339    #[doc = "Get enumerated values variant"]
340    #[inline(always)]
341    pub const fn variant(&self) -> Wordadjselect {
342        match self.bits {
343            false => Wordadjselect::Right,
344            true => Wordadjselect::Left,
345        }
346    }
347    #[doc = "Data is right adjusted in word"]
348    #[inline(always)]
349    pub fn is_right(&self) -> bool {
350        *self == Wordadjselect::Right
351    }
352    #[doc = "Data is left adjusted in word"]
353    #[inline(always)]
354    pub fn is_left(&self) -> bool {
355        *self == Wordadjselect::Left
356    }
357}
358#[doc = "Field `WORDADJ` writer - Data Word Formatting Adjust"]
359pub type WordadjW<'a, REG> = crate::BitWriter<'a, REG, Wordadjselect>;
360impl<'a, REG> WordadjW<'a, REG>
361where
362    REG: crate::Writable + crate::RegisterSpec,
363{
364    #[doc = "Data is right adjusted in word"]
365    #[inline(always)]
366    pub fn right(self) -> &'a mut crate::W<REG> {
367        self.variant(Wordadjselect::Right)
368    }
369    #[doc = "Data is left adjusted in word"]
370    #[inline(always)]
371    pub fn left(self) -> &'a mut crate::W<REG> {
372        self.variant(Wordadjselect::Left)
373    }
374}
375#[doc = "Data Formatting Bit Extension\n\nValue on reset: 0"]
376#[derive(Clone, Copy, Debug, PartialEq, Eq)]
377#[repr(u8)]
378pub enum Extendselect {
379    #[doc = "0: Extend with zeroes"]
380    Zero = 0,
381    #[doc = "1: Extend with ones"]
382    One = 1,
383    #[doc = "2: Extend with Most Significant Bit"]
384    Msbit = 2,
385    #[doc = "3: Extend with Least Significant Bit"]
386    Lsbit = 3,
387}
388impl From<Extendselect> for u8 {
389    #[inline(always)]
390    fn from(variant: Extendselect) -> Self {
391        variant as _
392    }
393}
394impl crate::FieldSpec for Extendselect {
395    type Ux = u8;
396}
397impl crate::IsEnum for Extendselect {}
398#[doc = "Field `EXTEND` reader - Data Formatting Bit Extension"]
399pub type ExtendR = crate::FieldReader<Extendselect>;
400impl ExtendR {
401    #[doc = "Get enumerated values variant"]
402    #[inline(always)]
403    pub const fn variant(&self) -> Extendselect {
404        match self.bits {
405            0 => Extendselect::Zero,
406            1 => Extendselect::One,
407            2 => Extendselect::Msbit,
408            3 => Extendselect::Lsbit,
409            _ => unreachable!(),
410        }
411    }
412    #[doc = "Extend with zeroes"]
413    #[inline(always)]
414    pub fn is_zero(&self) -> bool {
415        *self == Extendselect::Zero
416    }
417    #[doc = "Extend with ones"]
418    #[inline(always)]
419    pub fn is_one(&self) -> bool {
420        *self == Extendselect::One
421    }
422    #[doc = "Extend with Most Significant Bit"]
423    #[inline(always)]
424    pub fn is_msbit(&self) -> bool {
425        *self == Extendselect::Msbit
426    }
427    #[doc = "Extend with Least Significant Bit"]
428    #[inline(always)]
429    pub fn is_lsbit(&self) -> bool {
430        *self == Extendselect::Lsbit
431    }
432}
433#[doc = "Field `EXTEND` writer - Data Formatting Bit Extension"]
434pub type ExtendW<'a, REG> = crate::FieldWriter<'a, REG, 2, Extendselect, crate::Safe>;
435impl<'a, REG> ExtendW<'a, REG>
436where
437    REG: crate::Writable + crate::RegisterSpec,
438    REG::Ux: From<u8>,
439{
440    #[doc = "Extend with zeroes"]
441    #[inline(always)]
442    pub fn zero(self) -> &'a mut crate::W<REG> {
443        self.variant(Extendselect::Zero)
444    }
445    #[doc = "Extend with ones"]
446    #[inline(always)]
447    pub fn one(self) -> &'a mut crate::W<REG> {
448        self.variant(Extendselect::One)
449    }
450    #[doc = "Extend with Most Significant Bit"]
451    #[inline(always)]
452    pub fn msbit(self) -> &'a mut crate::W<REG> {
453        self.variant(Extendselect::Msbit)
454    }
455    #[doc = "Extend with Least Significant Bit"]
456    #[inline(always)]
457    pub fn lsbit(self) -> &'a mut crate::W<REG> {
458        self.variant(Extendselect::Lsbit)
459    }
460}
461#[doc = "Data Formatting Bit Reverse\n\nValue on reset: 0"]
462#[derive(Clone, Copy, Debug, PartialEq, Eq)]
463pub enum Bitrevselect {
464    #[doc = "0: Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
465    Msbit = 0,
466    #[doc = "1: Transfer Data Least Significant Bit (LSB) first"]
467    Lsbit = 1,
468}
469impl From<Bitrevselect> for bool {
470    #[inline(always)]
471    fn from(variant: Bitrevselect) -> Self {
472        variant as u8 != 0
473    }
474}
475#[doc = "Field `BITREV` reader - Data Formatting Bit Reverse"]
476pub type BitrevR = crate::BitReader<Bitrevselect>;
477impl BitrevR {
478    #[doc = "Get enumerated values variant"]
479    #[inline(always)]
480    pub const fn variant(&self) -> Bitrevselect {
481        match self.bits {
482            false => Bitrevselect::Msbit,
483            true => Bitrevselect::Lsbit,
484        }
485    }
486    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
487    #[inline(always)]
488    pub fn is_msbit(&self) -> bool {
489        *self == Bitrevselect::Msbit
490    }
491    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
492    #[inline(always)]
493    pub fn is_lsbit(&self) -> bool {
494        *self == Bitrevselect::Lsbit
495    }
496}
497#[doc = "Field `BITREV` writer - Data Formatting Bit Reverse"]
498pub type BitrevW<'a, REG> = crate::BitWriter<'a, REG, Bitrevselect>;
499impl<'a, REG> BitrevW<'a, REG>
500where
501    REG: crate::Writable + crate::RegisterSpec,
502{
503    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
504    #[inline(always)]
505    pub fn msbit(self) -> &'a mut crate::W<REG> {
506        self.variant(Bitrevselect::Msbit)
507    }
508    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
509    #[inline(always)]
510    pub fn lsbit(self) -> &'a mut crate::W<REG> {
511        self.variant(Bitrevselect::Lsbit)
512    }
513}
514#[doc = "Field `SLOTDIS0` reader - Slot 0 Disabled for this Serializer"]
515pub type Slotdis0R = crate::BitReader;
516#[doc = "Field `SLOTDIS0` writer - Slot 0 Disabled for this Serializer"]
517pub type Slotdis0W<'a, REG> = crate::BitWriter<'a, REG>;
518#[doc = "Field `SLOTDIS1` reader - Slot 1 Disabled for this Serializer"]
519pub type Slotdis1R = crate::BitReader;
520#[doc = "Field `SLOTDIS1` writer - Slot 1 Disabled for this Serializer"]
521pub type Slotdis1W<'a, REG> = crate::BitWriter<'a, REG>;
522#[doc = "Field `SLOTDIS2` reader - Slot 2 Disabled for this Serializer"]
523pub type Slotdis2R = crate::BitReader;
524#[doc = "Field `SLOTDIS2` writer - Slot 2 Disabled for this Serializer"]
525pub type Slotdis2W<'a, REG> = crate::BitWriter<'a, REG>;
526#[doc = "Field `SLOTDIS3` reader - Slot 3 Disabled for this Serializer"]
527pub type Slotdis3R = crate::BitReader;
528#[doc = "Field `SLOTDIS3` writer - Slot 3 Disabled for this Serializer"]
529pub type Slotdis3W<'a, REG> = crate::BitWriter<'a, REG>;
530#[doc = "Field `SLOTDIS4` reader - Slot 4 Disabled for this Serializer"]
531pub type Slotdis4R = crate::BitReader;
532#[doc = "Field `SLOTDIS4` writer - Slot 4 Disabled for this Serializer"]
533pub type Slotdis4W<'a, REG> = crate::BitWriter<'a, REG>;
534#[doc = "Field `SLOTDIS5` reader - Slot 5 Disabled for this Serializer"]
535pub type Slotdis5R = crate::BitReader;
536#[doc = "Field `SLOTDIS5` writer - Slot 5 Disabled for this Serializer"]
537pub type Slotdis5W<'a, REG> = crate::BitWriter<'a, REG>;
538#[doc = "Field `SLOTDIS6` reader - Slot 6 Disabled for this Serializer"]
539pub type Slotdis6R = crate::BitReader;
540#[doc = "Field `SLOTDIS6` writer - Slot 6 Disabled for this Serializer"]
541pub type Slotdis6W<'a, REG> = crate::BitWriter<'a, REG>;
542#[doc = "Field `SLOTDIS7` reader - Slot 7 Disabled for this Serializer"]
543pub type Slotdis7R = crate::BitReader;
544#[doc = "Field `SLOTDIS7` writer - Slot 7 Disabled for this Serializer"]
545pub type Slotdis7W<'a, REG> = crate::BitWriter<'a, REG>;
546#[doc = "Mono Mode\n\nValue on reset: 0"]
547#[derive(Clone, Copy, Debug, PartialEq, Eq)]
548pub enum Monoselect {
549    #[doc = "0: Normal mode"]
550    Stereo = 0,
551    #[doc = "1: Left channel data is duplicated to right channel"]
552    Mono = 1,
553}
554impl From<Monoselect> for bool {
555    #[inline(always)]
556    fn from(variant: Monoselect) -> Self {
557        variant as u8 != 0
558    }
559}
560#[doc = "Field `MONO` reader - Mono Mode"]
561pub type MonoR = crate::BitReader<Monoselect>;
562impl MonoR {
563    #[doc = "Get enumerated values variant"]
564    #[inline(always)]
565    pub const fn variant(&self) -> Monoselect {
566        match self.bits {
567            false => Monoselect::Stereo,
568            true => Monoselect::Mono,
569        }
570    }
571    #[doc = "Normal mode"]
572    #[inline(always)]
573    pub fn is_stereo(&self) -> bool {
574        *self == Monoselect::Stereo
575    }
576    #[doc = "Left channel data is duplicated to right channel"]
577    #[inline(always)]
578    pub fn is_mono(&self) -> bool {
579        *self == Monoselect::Mono
580    }
581}
582#[doc = "Field `MONO` writer - Mono Mode"]
583pub type MonoW<'a, REG> = crate::BitWriter<'a, REG, Monoselect>;
584impl<'a, REG> MonoW<'a, REG>
585where
586    REG: crate::Writable + crate::RegisterSpec,
587{
588    #[doc = "Normal mode"]
589    #[inline(always)]
590    pub fn stereo(self) -> &'a mut crate::W<REG> {
591        self.variant(Monoselect::Stereo)
592    }
593    #[doc = "Left channel data is duplicated to right channel"]
594    #[inline(always)]
595    pub fn mono(self) -> &'a mut crate::W<REG> {
596        self.variant(Monoselect::Mono)
597    }
598}
599#[doc = "Single or Multiple DMA Channels\n\nValue on reset: 0"]
600#[derive(Clone, Copy, Debug, PartialEq, Eq)]
601pub enum Dmaselect {
602    #[doc = "0: Single DMA channel"]
603    Single = 0,
604    #[doc = "1: One DMA channel per data channel"]
605    Multiple = 1,
606}
607impl From<Dmaselect> for bool {
608    #[inline(always)]
609    fn from(variant: Dmaselect) -> Self {
610        variant as u8 != 0
611    }
612}
613#[doc = "Field `DMA` reader - Single or Multiple DMA Channels"]
614pub type DmaR = crate::BitReader<Dmaselect>;
615impl DmaR {
616    #[doc = "Get enumerated values variant"]
617    #[inline(always)]
618    pub const fn variant(&self) -> Dmaselect {
619        match self.bits {
620            false => Dmaselect::Single,
621            true => Dmaselect::Multiple,
622        }
623    }
624    #[doc = "Single DMA channel"]
625    #[inline(always)]
626    pub fn is_single(&self) -> bool {
627        *self == Dmaselect::Single
628    }
629    #[doc = "One DMA channel per data channel"]
630    #[inline(always)]
631    pub fn is_multiple(&self) -> bool {
632        *self == Dmaselect::Multiple
633    }
634}
635#[doc = "Field `DMA` writer - Single or Multiple DMA Channels"]
636pub type DmaW<'a, REG> = crate::BitWriter<'a, REG, Dmaselect>;
637impl<'a, REG> DmaW<'a, REG>
638where
639    REG: crate::Writable + crate::RegisterSpec,
640{
641    #[doc = "Single DMA channel"]
642    #[inline(always)]
643    pub fn single(self) -> &'a mut crate::W<REG> {
644        self.variant(Dmaselect::Single)
645    }
646    #[doc = "One DMA channel per data channel"]
647    #[inline(always)]
648    pub fn multiple(self) -> &'a mut crate::W<REG> {
649        self.variant(Dmaselect::Multiple)
650    }
651}
652impl R {
653    #[doc = "Bits 2:3 - Line Default Line when Slot Disabled"]
654    #[inline(always)]
655    pub fn txdefault(&self) -> TxdefaultR {
656        TxdefaultR::new(((self.bits >> 2) & 3) as u8)
657    }
658    #[doc = "Bit 4 - Transmit Data when Underrun"]
659    #[inline(always)]
660    pub fn txsame(&self) -> TxsameR {
661        TxsameR::new(((self.bits >> 4) & 1) != 0)
662    }
663    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
664    #[inline(always)]
665    pub fn slotadj(&self) -> SlotadjR {
666        SlotadjR::new(((self.bits >> 7) & 1) != 0)
667    }
668    #[doc = "Bits 8:10 - Data Word Size"]
669    #[inline(always)]
670    pub fn datasize(&self) -> DatasizeR {
671        DatasizeR::new(((self.bits >> 8) & 7) as u8)
672    }
673    #[doc = "Bit 12 - Data Word Formatting Adjust"]
674    #[inline(always)]
675    pub fn wordadj(&self) -> WordadjR {
676        WordadjR::new(((self.bits >> 12) & 1) != 0)
677    }
678    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
679    #[inline(always)]
680    pub fn extend(&self) -> ExtendR {
681        ExtendR::new(((self.bits >> 13) & 3) as u8)
682    }
683    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
684    #[inline(always)]
685    pub fn bitrev(&self) -> BitrevR {
686        BitrevR::new(((self.bits >> 15) & 1) != 0)
687    }
688    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
689    #[inline(always)]
690    pub fn slotdis0(&self) -> Slotdis0R {
691        Slotdis0R::new(((self.bits >> 16) & 1) != 0)
692    }
693    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
694    #[inline(always)]
695    pub fn slotdis1(&self) -> Slotdis1R {
696        Slotdis1R::new(((self.bits >> 17) & 1) != 0)
697    }
698    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
699    #[inline(always)]
700    pub fn slotdis2(&self) -> Slotdis2R {
701        Slotdis2R::new(((self.bits >> 18) & 1) != 0)
702    }
703    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
704    #[inline(always)]
705    pub fn slotdis3(&self) -> Slotdis3R {
706        Slotdis3R::new(((self.bits >> 19) & 1) != 0)
707    }
708    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
709    #[inline(always)]
710    pub fn slotdis4(&self) -> Slotdis4R {
711        Slotdis4R::new(((self.bits >> 20) & 1) != 0)
712    }
713    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
714    #[inline(always)]
715    pub fn slotdis5(&self) -> Slotdis5R {
716        Slotdis5R::new(((self.bits >> 21) & 1) != 0)
717    }
718    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
719    #[inline(always)]
720    pub fn slotdis6(&self) -> Slotdis6R {
721        Slotdis6R::new(((self.bits >> 22) & 1) != 0)
722    }
723    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
724    #[inline(always)]
725    pub fn slotdis7(&self) -> Slotdis7R {
726        Slotdis7R::new(((self.bits >> 23) & 1) != 0)
727    }
728    #[doc = "Bit 24 - Mono Mode"]
729    #[inline(always)]
730    pub fn mono(&self) -> MonoR {
731        MonoR::new(((self.bits >> 24) & 1) != 0)
732    }
733    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
734    #[inline(always)]
735    pub fn dma(&self) -> DmaR {
736        DmaR::new(((self.bits >> 25) & 1) != 0)
737    }
738}
739impl W {
740    #[doc = "Bits 2:3 - Line Default Line when Slot Disabled"]
741    #[inline(always)]
742    #[must_use]
743    pub fn txdefault(&mut self) -> TxdefaultW<TxctrlSpec> {
744        TxdefaultW::new(self, 2)
745    }
746    #[doc = "Bit 4 - Transmit Data when Underrun"]
747    #[inline(always)]
748    #[must_use]
749    pub fn txsame(&mut self) -> TxsameW<TxctrlSpec> {
750        TxsameW::new(self, 4)
751    }
752    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
753    #[inline(always)]
754    #[must_use]
755    pub fn slotadj(&mut self) -> SlotadjW<TxctrlSpec> {
756        SlotadjW::new(self, 7)
757    }
758    #[doc = "Bits 8:10 - Data Word Size"]
759    #[inline(always)]
760    #[must_use]
761    pub fn datasize(&mut self) -> DatasizeW<TxctrlSpec> {
762        DatasizeW::new(self, 8)
763    }
764    #[doc = "Bit 12 - Data Word Formatting Adjust"]
765    #[inline(always)]
766    #[must_use]
767    pub fn wordadj(&mut self) -> WordadjW<TxctrlSpec> {
768        WordadjW::new(self, 12)
769    }
770    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
771    #[inline(always)]
772    #[must_use]
773    pub fn extend(&mut self) -> ExtendW<TxctrlSpec> {
774        ExtendW::new(self, 13)
775    }
776    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
777    #[inline(always)]
778    #[must_use]
779    pub fn bitrev(&mut self) -> BitrevW<TxctrlSpec> {
780        BitrevW::new(self, 15)
781    }
782    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
783    #[inline(always)]
784    #[must_use]
785    pub fn slotdis0(&mut self) -> Slotdis0W<TxctrlSpec> {
786        Slotdis0W::new(self, 16)
787    }
788    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
789    #[inline(always)]
790    #[must_use]
791    pub fn slotdis1(&mut self) -> Slotdis1W<TxctrlSpec> {
792        Slotdis1W::new(self, 17)
793    }
794    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
795    #[inline(always)]
796    #[must_use]
797    pub fn slotdis2(&mut self) -> Slotdis2W<TxctrlSpec> {
798        Slotdis2W::new(self, 18)
799    }
800    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
801    #[inline(always)]
802    #[must_use]
803    pub fn slotdis3(&mut self) -> Slotdis3W<TxctrlSpec> {
804        Slotdis3W::new(self, 19)
805    }
806    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
807    #[inline(always)]
808    #[must_use]
809    pub fn slotdis4(&mut self) -> Slotdis4W<TxctrlSpec> {
810        Slotdis4W::new(self, 20)
811    }
812    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
813    #[inline(always)]
814    #[must_use]
815    pub fn slotdis5(&mut self) -> Slotdis5W<TxctrlSpec> {
816        Slotdis5W::new(self, 21)
817    }
818    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
819    #[inline(always)]
820    #[must_use]
821    pub fn slotdis6(&mut self) -> Slotdis6W<TxctrlSpec> {
822        Slotdis6W::new(self, 22)
823    }
824    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
825    #[inline(always)]
826    #[must_use]
827    pub fn slotdis7(&mut self) -> Slotdis7W<TxctrlSpec> {
828        Slotdis7W::new(self, 23)
829    }
830    #[doc = "Bit 24 - Mono Mode"]
831    #[inline(always)]
832    #[must_use]
833    pub fn mono(&mut self) -> MonoW<TxctrlSpec> {
834        MonoW::new(self, 24)
835    }
836    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
837    #[inline(always)]
838    #[must_use]
839    pub fn dma(&mut self) -> DmaW<TxctrlSpec> {
840        DmaW::new(self, 25)
841    }
842}
843#[doc = "Tx Serializer Control\n\nYou can [`read`](crate::Reg::read) this register and get [`txctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`txctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
844pub struct TxctrlSpec;
845impl crate::RegisterSpec for TxctrlSpec {
846    type Ux = u32;
847}
848#[doc = "`read()` method returns [`txctrl::R`](R) reader structure"]
849impl crate::Readable for TxctrlSpec {}
850#[doc = "`write(|w| ..)` method takes [`txctrl::W`](W) writer structure"]
851impl crate::Writable for TxctrlSpec {
852    type Safety = crate::Unsafe;
853    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
854    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
855}
856#[doc = "`reset()` method sets TXCTRL to value 0"]
857impl crate::Resettable for TxctrlSpec {
858    const RESET_VALUE: u32 = 0;
859}
atsamd51n/i2s/txctrl.rs

atsamd51n/i2s/
txctrl.rs
