1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 cr: Cr,
5 ccr: Ccr,
6 trigger: Trigger,
7 _reserved3: [u8; 0x04],
8 sr: Sr,
9 scr: Scr,
10 _reserved5: [u8; 0x08],
11 teevr: Teevr,
12 tecr1: Tecr1,
13 fflr: Fflr,
14 _reserved8: [u8; 0x0114],
15 cntrldvr1: Cntrldvr1,
16 _reserved9: [u8; 0x9c],
17 syncfr: Syncfr,
18 idr: Idr,
19 ccer: Ccer,
20 _reserved12: [u8; 0x04],
21 tesseicr: Tesseicr,
22 _reserved13: [u8; 0x04],
23 tsevt: Tsevt,
24 _reserved14: [u8; 0x04],
25 traceidr: Traceidr,
26 _reserved15: [u8; 0x04],
27 idr2: Idr2,
28 _reserved16: [u8; 0x0108],
29 pdsr: Pdsr,
30 _reserved17: [u8; 0x0bc8],
31 itmiscin: Itmiscin,
32 _reserved18: [u8; 0x04],
33 ittrigout: Ittrigout,
34 _reserved19: [u8; 0x04],
35 itatbctr2: Itatbctr2,
36 _reserved20: [u8; 0x04],
37 itatbctr0: Itatbctr0,
38 _reserved21: [u8; 0x04],
39 itctrl: Itctrl,
40 _reserved22: [u8; 0x9c],
41 claimset: Claimset,
42 claimclr: Claimclr,
43 _reserved24: [u8; 0x08],
44 lar: Lar,
45 lsr: Lsr,
46 authstatus: Authstatus,
47 _reserved27: [u8; 0x10],
48 devtype: Devtype,
49 pidr4: Pidr4,
50 pidr5: Pidr5,
51 pidr6: Pidr6,
52 pidr7: Pidr7,
53 pidr0: Pidr0,
54 pidr1: Pidr1,
55 pidr2: Pidr2,
56 pidr3: Pidr3,
57 cidr0: Cidr0,
58 cidr1: Cidr1,
59 cidr2: Cidr2,
60 cidr3: Cidr3,
61}
62impl RegisterBlock {
63 #[doc = "0x00 - ETM Main Control Register"]
64 #[inline(always)]
65 pub const fn cr(&self) -> &Cr {
66 &self.cr
67 }
68 #[doc = "0x04 - ETM Configuration Code Register"]
69 #[inline(always)]
70 pub const fn ccr(&self) -> &Ccr {
71 &self.ccr
72 }
73 #[doc = "0x08 - ETM Trigger Event Register"]
74 #[inline(always)]
75 pub const fn trigger(&self) -> &Trigger {
76 &self.trigger
77 }
78 #[doc = "0x10 - ETM Status Register"]
79 #[inline(always)]
80 pub const fn sr(&self) -> &Sr {
81 &self.sr
82 }
83 #[doc = "0x14 - ETM System Configuration Register"]
84 #[inline(always)]
85 pub const fn scr(&self) -> &Scr {
86 &self.scr
87 }
88 #[doc = "0x20 - ETM TraceEnable Event Register"]
89 #[inline(always)]
90 pub const fn teevr(&self) -> &Teevr {
91 &self.teevr
92 }
93 #[doc = "0x24 - ETM TraceEnable Control 1 Register"]
94 #[inline(always)]
95 pub const fn tecr1(&self) -> &Tecr1 {
96 &self.tecr1
97 }
98 #[doc = "0x28 - ETM FIFO Full Level Register"]
99 #[inline(always)]
100 pub const fn fflr(&self) -> &Fflr {
101 &self.fflr
102 }
103 #[doc = "0x140 - ETM Free-running Counter Reload Value"]
104 #[inline(always)]
105 pub const fn cntrldvr1(&self) -> &Cntrldvr1 {
106 &self.cntrldvr1
107 }
108 #[doc = "0x1e0 - ETM Synchronization Frequency Register"]
109 #[inline(always)]
110 pub const fn syncfr(&self) -> &Syncfr {
111 &self.syncfr
112 }
113 #[doc = "0x1e4 - ETM ID Register"]
114 #[inline(always)]
115 pub const fn idr(&self) -> &Idr {
116 &self.idr
117 }
118 #[doc = "0x1e8 - ETM Configuration Code Extension Register"]
119 #[inline(always)]
120 pub const fn ccer(&self) -> &Ccer {
121 &self.ccer
122 }
123 #[doc = "0x1f0 - ETM TraceEnable Start/Stop EmbeddedICE Control Register"]
124 #[inline(always)]
125 pub const fn tesseicr(&self) -> &Tesseicr {
126 &self.tesseicr
127 }
128 #[doc = "0x1f8 - ETM TimeStamp Event Register"]
129 #[inline(always)]
130 pub const fn tsevt(&self) -> &Tsevt {
131 &self.tsevt
132 }
133 #[doc = "0x200 - ETM CoreSight Trace ID Register"]
134 #[inline(always)]
135 pub const fn traceidr(&self) -> &Traceidr {
136 &self.traceidr
137 }
138 #[doc = "0x208 - ETM ID Register 2"]
139 #[inline(always)]
140 pub const fn idr2(&self) -> &Idr2 {
141 &self.idr2
142 }
143 #[doc = "0x314 - ETM Device Power-Down Status Register"]
144 #[inline(always)]
145 pub const fn pdsr(&self) -> &Pdsr {
146 &self.pdsr
147 }
148 #[doc = "0xee0 - ETM Integration Test Miscellaneous Inputs"]
149 #[inline(always)]
150 pub const fn itmiscin(&self) -> &Itmiscin {
151 &self.itmiscin
152 }
153 #[doc = "0xee8 - ETM Integration Test Trigger Out"]
154 #[inline(always)]
155 pub const fn ittrigout(&self) -> &Ittrigout {
156 &self.ittrigout
157 }
158 #[doc = "0xef0 - ETM Integration Test ATB Control 2"]
159 #[inline(always)]
160 pub const fn itatbctr2(&self) -> &Itatbctr2 {
161 &self.itatbctr2
162 }
163 #[doc = "0xef8 - ETM Integration Test ATB Control 0"]
164 #[inline(always)]
165 pub const fn itatbctr0(&self) -> &Itatbctr0 {
166 &self.itatbctr0
167 }
168 #[doc = "0xf00 - ETM Integration Mode Control Register"]
169 #[inline(always)]
170 pub const fn itctrl(&self) -> &Itctrl {
171 &self.itctrl
172 }
173 #[doc = "0xfa0 - ETM Claim Tag Set Register"]
174 #[inline(always)]
175 pub const fn claimset(&self) -> &Claimset {
176 &self.claimset
177 }
178 #[doc = "0xfa4 - ETM Claim Tag Clear Register"]
179 #[inline(always)]
180 pub const fn claimclr(&self) -> &Claimclr {
181 &self.claimclr
182 }
183 #[doc = "0xfb0 - ETM Lock Access Register"]
184 #[inline(always)]
185 pub const fn lar(&self) -> &Lar {
186 &self.lar
187 }
188 #[doc = "0xfb4 - ETM Lock Status Register"]
189 #[inline(always)]
190 pub const fn lsr(&self) -> &Lsr {
191 &self.lsr
192 }
193 #[doc = "0xfb8 - ETM Authentication Status Register"]
194 #[inline(always)]
195 pub const fn authstatus(&self) -> &Authstatus {
196 &self.authstatus
197 }
198 #[doc = "0xfcc - ETM CoreSight Device Type Register"]
199 #[inline(always)]
200 pub const fn devtype(&self) -> &Devtype {
201 &self.devtype
202 }
203 #[doc = "0xfd0 - ETM Peripheral Identification Register #4"]
204 #[inline(always)]
205 pub const fn pidr4(&self) -> &Pidr4 {
206 &self.pidr4
207 }
208 #[doc = "0xfd4 - ETM Peripheral Identification Register #5"]
209 #[inline(always)]
210 pub const fn pidr5(&self) -> &Pidr5 {
211 &self.pidr5
212 }
213 #[doc = "0xfd8 - ETM Peripheral Identification Register #6"]
214 #[inline(always)]
215 pub const fn pidr6(&self) -> &Pidr6 {
216 &self.pidr6
217 }
218 #[doc = "0xfdc - ETM Peripheral Identification Register #7"]
219 #[inline(always)]
220 pub const fn pidr7(&self) -> &Pidr7 {
221 &self.pidr7
222 }
223 #[doc = "0xfe0 - ETM Peripheral Identification Register #0"]
224 #[inline(always)]
225 pub const fn pidr0(&self) -> &Pidr0 {
226 &self.pidr0
227 }
228 #[doc = "0xfe4 - ETM Peripheral Identification Register #1"]
229 #[inline(always)]
230 pub const fn pidr1(&self) -> &Pidr1 {
231 &self.pidr1
232 }
233 #[doc = "0xfe8 - ETM Peripheral Identification Register #2"]
234 #[inline(always)]
235 pub const fn pidr2(&self) -> &Pidr2 {
236 &self.pidr2
237 }
238 #[doc = "0xfec - ETM Peripheral Identification Register #3"]
239 #[inline(always)]
240 pub const fn pidr3(&self) -> &Pidr3 {
241 &self.pidr3
242 }
243 #[doc = "0xff0 - ETM Component Identification Register #0"]
244 #[inline(always)]
245 pub const fn cidr0(&self) -> &Cidr0 {
246 &self.cidr0
247 }
248 #[doc = "0xff4 - ETM Component Identification Register #1"]
249 #[inline(always)]
250 pub const fn cidr1(&self) -> &Cidr1 {
251 &self.cidr1
252 }
253 #[doc = "0xff8 - ETM Component Identification Register #2"]
254 #[inline(always)]
255 pub const fn cidr2(&self) -> &Cidr2 {
256 &self.cidr2
257 }
258 #[doc = "0xffc - ETM Component Identification Register #3"]
259 #[inline(always)]
260 pub const fn cidr3(&self) -> &Cidr3 {
261 &self.cidr3
262 }
263}
264#[doc = "CR (rw) register accessor: ETM Main Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cr`]
265module"]
266#[doc(alias = "CR")]
267pub type Cr = crate::Reg<cr::CrSpec>;
268#[doc = "ETM Main Control Register"]
269pub mod cr;
270#[doc = "CCR (r) register accessor: ETM Configuration Code Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`]
271module"]
272#[doc(alias = "CCR")]
273pub type Ccr = crate::Reg<ccr::CcrSpec>;
274#[doc = "ETM Configuration Code Register"]
275pub mod ccr;
276#[doc = "TRIGGER (rw) register accessor: ETM Trigger Event Register\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trigger`]
277module"]
278#[doc(alias = "TRIGGER")]
279pub type Trigger = crate::Reg<trigger::TriggerSpec>;
280#[doc = "ETM Trigger Event Register"]
281pub mod trigger;
282#[doc = "SR (rw) register accessor: ETM Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`sr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sr`]
283module"]
284#[doc(alias = "SR")]
285pub type Sr = crate::Reg<sr::SrSpec>;
286#[doc = "ETM Status Register"]
287pub mod sr;
288#[doc = "SCR (r) register accessor: ETM System Configuration Register\n\nYou can [`read`](crate::Reg::read) this register and get [`scr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@scr`]
289module"]
290#[doc(alias = "SCR")]
291pub type Scr = crate::Reg<scr::ScrSpec>;
292#[doc = "ETM System Configuration Register"]
293pub mod scr;
294#[doc = "TEEVR (rw) register accessor: ETM TraceEnable Event Register\n\nYou can [`read`](crate::Reg::read) this register and get [`teevr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`teevr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@teevr`]
295module"]
296#[doc(alias = "TEEVR")]
297pub type Teevr = crate::Reg<teevr::TeevrSpec>;
298#[doc = "ETM TraceEnable Event Register"]
299pub mod teevr;
300#[doc = "TECR1 (rw) register accessor: ETM TraceEnable Control 1 Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tecr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tecr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tecr1`]
301module"]
302#[doc(alias = "TECR1")]
303pub type Tecr1 = crate::Reg<tecr1::Tecr1Spec>;
304#[doc = "ETM TraceEnable Control 1 Register"]
305pub mod tecr1;
306#[doc = "FFLR (rw) register accessor: ETM FIFO Full Level Register\n\nYou can [`read`](crate::Reg::read) this register and get [`fflr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fflr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fflr`]
307module"]
308#[doc(alias = "FFLR")]
309pub type Fflr = crate::Reg<fflr::FflrSpec>;
310#[doc = "ETM FIFO Full Level Register"]
311pub mod fflr;
312#[doc = "CNTRLDVR1 (rw) register accessor: ETM Free-running Counter Reload Value\n\nYou can [`read`](crate::Reg::read) this register and get [`cntrldvr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cntrldvr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cntrldvr1`]
313module"]
314#[doc(alias = "CNTRLDVR1")]
315pub type Cntrldvr1 = crate::Reg<cntrldvr1::Cntrldvr1Spec>;
316#[doc = "ETM Free-running Counter Reload Value"]
317pub mod cntrldvr1;
318#[doc = "SYNCFR (r) register accessor: ETM Synchronization Frequency Register\n\nYou can [`read`](crate::Reg::read) this register and get [`syncfr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@syncfr`]
319module"]
320#[doc(alias = "SYNCFR")]
321pub type Syncfr = crate::Reg<syncfr::SyncfrSpec>;
322#[doc = "ETM Synchronization Frequency Register"]
323pub mod syncfr;
324#[doc = "IDR (r) register accessor: ETM ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`idr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr`]
325module"]
326#[doc(alias = "IDR")]
327pub type Idr = crate::Reg<idr::IdrSpec>;
328#[doc = "ETM ID Register"]
329pub mod idr;
330#[doc = "CCER (r) register accessor: ETM Configuration Code Extension Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ccer::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccer`]
331module"]
332#[doc(alias = "CCER")]
333pub type Ccer = crate::Reg<ccer::CcerSpec>;
334#[doc = "ETM Configuration Code Extension Register"]
335pub mod ccer;
336#[doc = "TESSEICR (rw) register accessor: ETM TraceEnable Start/Stop EmbeddedICE Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tesseicr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tesseicr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tesseicr`]
337module"]
338#[doc(alias = "TESSEICR")]
339pub type Tesseicr = crate::Reg<tesseicr::TesseicrSpec>;
340#[doc = "ETM TraceEnable Start/Stop EmbeddedICE Control Register"]
341pub mod tesseicr;
342#[doc = "TSEVT (rw) register accessor: ETM TimeStamp Event Register\n\nYou can [`read`](crate::Reg::read) this register and get [`tsevt::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsevt::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsevt`]
343module"]
344#[doc(alias = "TSEVT")]
345pub type Tsevt = crate::Reg<tsevt::TsevtSpec>;
346#[doc = "ETM TimeStamp Event Register"]
347pub mod tsevt;
348#[doc = "TRACEIDR (rw) register accessor: ETM CoreSight Trace ID Register\n\nYou can [`read`](crate::Reg::read) this register and get [`traceidr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`traceidr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@traceidr`]
349module"]
350#[doc(alias = "TRACEIDR")]
351pub type Traceidr = crate::Reg<traceidr::TraceidrSpec>;
352#[doc = "ETM CoreSight Trace ID Register"]
353pub mod traceidr;
354#[doc = "IDR2 (r) register accessor: ETM ID Register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`idr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@idr2`]
355module"]
356#[doc(alias = "IDR2")]
357pub type Idr2 = crate::Reg<idr2::Idr2Spec>;
358#[doc = "ETM ID Register 2"]
359pub mod idr2;
360#[doc = "PDSR (r) register accessor: ETM Device Power-Down Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`pdsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdsr`]
361module"]
362#[doc(alias = "PDSR")]
363pub type Pdsr = crate::Reg<pdsr::PdsrSpec>;
364#[doc = "ETM Device Power-Down Status Register"]
365pub mod pdsr;
366#[doc = "ITMISCIN (r) register accessor: ETM Integration Test Miscellaneous Inputs\n\nYou can [`read`](crate::Reg::read) this register and get [`itmiscin::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@itmiscin`]
367module"]
368#[doc(alias = "ITMISCIN")]
369pub type Itmiscin = crate::Reg<itmiscin::ItmiscinSpec>;
370#[doc = "ETM Integration Test Miscellaneous Inputs"]
371pub mod itmiscin;
372#[doc = "ITTRIGOUT (w) register accessor: ETM Integration Test Trigger Out\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ittrigout::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ittrigout`]
373module"]
374#[doc(alias = "ITTRIGOUT")]
375pub type Ittrigout = crate::Reg<ittrigout::IttrigoutSpec>;
376#[doc = "ETM Integration Test Trigger Out"]
377pub mod ittrigout;
378#[doc = "ITATBCTR2 (r) register accessor: ETM Integration Test ATB Control 2\n\nYou can [`read`](crate::Reg::read) this register and get [`itatbctr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@itatbctr2`]
379module"]
380#[doc(alias = "ITATBCTR2")]
381pub type Itatbctr2 = crate::Reg<itatbctr2::Itatbctr2Spec>;
382#[doc = "ETM Integration Test ATB Control 2"]
383pub mod itatbctr2;
384#[doc = "ITATBCTR0 (w) register accessor: ETM Integration Test ATB Control 0\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`itatbctr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@itatbctr0`]
385module"]
386#[doc(alias = "ITATBCTR0")]
387pub type Itatbctr0 = crate::Reg<itatbctr0::Itatbctr0Spec>;
388#[doc = "ETM Integration Test ATB Control 0"]
389pub mod itatbctr0;
390#[doc = "ITCTRL (rw) register accessor: ETM Integration Mode Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`itctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`itctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@itctrl`]
391module"]
392#[doc(alias = "ITCTRL")]
393pub type Itctrl = crate::Reg<itctrl::ItctrlSpec>;
394#[doc = "ETM Integration Mode Control Register"]
395pub mod itctrl;
396#[doc = "CLAIMSET (rw) register accessor: ETM Claim Tag Set Register\n\nYou can [`read`](crate::Reg::read) this register and get [`claimset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`claimset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@claimset`]
397module"]
398#[doc(alias = "CLAIMSET")]
399pub type Claimset = crate::Reg<claimset::ClaimsetSpec>;
400#[doc = "ETM Claim Tag Set Register"]
401pub mod claimset;
402#[doc = "CLAIMCLR (rw) register accessor: ETM Claim Tag Clear Register\n\nYou can [`read`](crate::Reg::read) this register and get [`claimclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`claimclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@claimclr`]
403module"]
404#[doc(alias = "CLAIMCLR")]
405pub type Claimclr = crate::Reg<claimclr::ClaimclrSpec>;
406#[doc = "ETM Claim Tag Clear Register"]
407pub mod claimclr;
408#[doc = "LAR (w) register accessor: ETM Lock Access Register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lar::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lar`]
409module"]
410#[doc(alias = "LAR")]
411pub type Lar = crate::Reg<lar::LarSpec>;
412#[doc = "ETM Lock Access Register"]
413pub mod lar;
414#[doc = "LSR (r) register accessor: ETM Lock Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`lsr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lsr`]
415module"]
416#[doc(alias = "LSR")]
417pub type Lsr = crate::Reg<lsr::LsrSpec>;
418#[doc = "ETM Lock Status Register"]
419pub mod lsr;
420#[doc = "AUTHSTATUS (r) register accessor: ETM Authentication Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`authstatus::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@authstatus`]
421module"]
422#[doc(alias = "AUTHSTATUS")]
423pub type Authstatus = crate::Reg<authstatus::AuthstatusSpec>;
424#[doc = "ETM Authentication Status Register"]
425pub mod authstatus;
426#[doc = "DEVTYPE (r) register accessor: ETM CoreSight Device Type Register\n\nYou can [`read`](crate::Reg::read) this register and get [`devtype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@devtype`]
427module"]
428#[doc(alias = "DEVTYPE")]
429pub type Devtype = crate::Reg<devtype::DevtypeSpec>;
430#[doc = "ETM CoreSight Device Type Register"]
431pub mod devtype;
432#[doc = "PIDR4 (r) register accessor: ETM Peripheral Identification Register #4\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr4`]
433module"]
434#[doc(alias = "PIDR4")]
435pub type Pidr4 = crate::Reg<pidr4::Pidr4Spec>;
436#[doc = "ETM Peripheral Identification Register #4"]
437pub mod pidr4;
438#[doc = "PIDR5 (r) register accessor: ETM Peripheral Identification Register #5\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr5::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr5`]
439module"]
440#[doc(alias = "PIDR5")]
441pub type Pidr5 = crate::Reg<pidr5::Pidr5Spec>;
442#[doc = "ETM Peripheral Identification Register #5"]
443pub mod pidr5;
444#[doc = "PIDR6 (r) register accessor: ETM Peripheral Identification Register #6\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr6::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr6`]
445module"]
446#[doc(alias = "PIDR6")]
447pub type Pidr6 = crate::Reg<pidr6::Pidr6Spec>;
448#[doc = "ETM Peripheral Identification Register #6"]
449pub mod pidr6;
450#[doc = "PIDR7 (r) register accessor: ETM Peripheral Identification Register #7\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr7::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr7`]
451module"]
452#[doc(alias = "PIDR7")]
453pub type Pidr7 = crate::Reg<pidr7::Pidr7Spec>;
454#[doc = "ETM Peripheral Identification Register #7"]
455pub mod pidr7;
456#[doc = "PIDR0 (r) register accessor: ETM Peripheral Identification Register #0\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr0`]
457module"]
458#[doc(alias = "PIDR0")]
459pub type Pidr0 = crate::Reg<pidr0::Pidr0Spec>;
460#[doc = "ETM Peripheral Identification Register #0"]
461pub mod pidr0;
462#[doc = "PIDR1 (r) register accessor: ETM Peripheral Identification Register #1\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr1`]
463module"]
464#[doc(alias = "PIDR1")]
465pub type Pidr1 = crate::Reg<pidr1::Pidr1Spec>;
466#[doc = "ETM Peripheral Identification Register #1"]
467pub mod pidr1;
468#[doc = "PIDR2 (r) register accessor: ETM Peripheral Identification Register #2\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr2`]
469module"]
470#[doc(alias = "PIDR2")]
471pub type Pidr2 = crate::Reg<pidr2::Pidr2Spec>;
472#[doc = "ETM Peripheral Identification Register #2"]
473pub mod pidr2;
474#[doc = "PIDR3 (r) register accessor: ETM Peripheral Identification Register #3\n\nYou can [`read`](crate::Reg::read) this register and get [`pidr3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pidr3`]
475module"]
476#[doc(alias = "PIDR3")]
477pub type Pidr3 = crate::Reg<pidr3::Pidr3Spec>;
478#[doc = "ETM Peripheral Identification Register #3"]
479pub mod pidr3;
480#[doc = "CIDR0 (r) register accessor: ETM Component Identification Register #0\n\nYou can [`read`](crate::Reg::read) this register and get [`cidr0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cidr0`]
481module"]
482#[doc(alias = "CIDR0")]
483pub type Cidr0 = crate::Reg<cidr0::Cidr0Spec>;
484#[doc = "ETM Component Identification Register #0"]
485pub mod cidr0;
486#[doc = "CIDR1 (r) register accessor: ETM Component Identification Register #1\n\nYou can [`read`](crate::Reg::read) this register and get [`cidr1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cidr1`]
487module"]
488#[doc(alias = "CIDR1")]
489pub type Cidr1 = crate::Reg<cidr1::Cidr1Spec>;
490#[doc = "ETM Component Identification Register #1"]
491pub mod cidr1;
492#[doc = "CIDR2 (r) register accessor: ETM Component Identification Register #2\n\nYou can [`read`](crate::Reg::read) this register and get [`cidr2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cidr2`]
493module"]
494#[doc(alias = "CIDR2")]
495pub type Cidr2 = crate::Reg<cidr2::Cidr2Spec>;
496#[doc = "ETM Component Identification Register #2"]
497pub mod cidr2;
498#[doc = "CIDR3 (r) register accessor: ETM Component Identification Register #3\n\nYou can [`read`](crate::Reg::read) this register and get [`cidr3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cidr3`]
499module"]
500#[doc(alias = "CIDR3")]
501pub type Cidr3 = crate::Reg<cidr3::Cidr3Spec>;
502#[doc = "ETM Component Identification Register #3"]
503pub mod cidr3;