atsamd_hal/sercom/pad/
impl_pad_thumbv7em.rs

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1//! Implementations of the [`IsPad`], [`GetPad`] and [`InIoSet`] traits
2
3use crate::gpio::*;
4use crate::sercom::*;
5
6//==============================================================================
7//  Pad definitions
8//==============================================================================
9
10macro_rules! pad_info {
11
12    (
13        $PinId:ident,
14        $Cfg:ident,
15        $Sercom:ident,
16        $PadNum:ident,
17        $( $IoSet:ident ),+
18    ) => {
19        pad_info!(@impl_pad, $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ );
20    };
21
22    (
23        $PinId:ident,
24        $Cfg:ident,
25        $Sercom:ident,
26        $PadNum:ident,
27        $( $IoSet:ident ),+
28        + I2C
29    ) => {
30        impl IsI2cPad for Pin<$PinId, Alternate<$Cfg>> {}
31        pad_info!(@impl_pad, $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ );
32    };
33
34    (
35        @impl_pad,
36        $PinId:ident,
37        $Cfg:ident,
38        $Sercom:ident,
39        $PadNum:ident,
40        $( $IoSet:ident ),+
41    ) => {
42        impl GetPad<$Sercom> for $PinId {
43            type PadNum = $PadNum;
44            type PinMode = Alternate<$Cfg>;
45        }
46        $(
47            impl InIoSet<$IoSet> for Pin<$PinId, Alternate<$Cfg>> {}
48        )+
49        impl IsPad for Pin<$PinId, Alternate<$Cfg>> {
50            type Sercom = $Sercom;
51            type PadNum = $PadNum;
52        }
53    };
54}
55
56macro_rules! pad_table {
57    (
58        #[$id_cfg:meta]
59        $PinId:ident {
60            $(
61                $( #[$sercom_cfg:meta] )?
62                $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
63            )+
64        }
65    ) => {
66        $(
67            #[$id_cfg]
68            $( #[$sercom_cfg] )?
69            pad_info!( $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ $( + $I2C )?);
70        )+
71    };
72    (
73        $PinId:ident {
74            $(
75                $( #[$sercom_cfg:meta] )?
76                $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
77            )+
78        }
79    ) => {
80        $(
81            $( #[$sercom_cfg] )?
82            pad_info!( $PinId, $Cfg, $Sercom, $PadNum, $( $IoSet ),+ $( + $I2C )?);
83        )+
84    };
85    (
86        $(
87            $( #[$id_cfg:meta] )?
88            $PinId:ident {
89                $(
90                    $( #[$sercom_cfg:meta] )?
91                    $Cfg:ident: ( $Sercom:ident, $PadNum:ident, $( $IoSet:ident ),+ ) $( + $I2C:ident )?,
92                )+
93            }
94        )+
95    ) => {
96        $(
97            pad_table!(
98                $( #[$id_cfg] )?
99                $PinId{
100                    $(
101                        $( #[$sercom_cfg] )?
102                        $Cfg: ( $Sercom, $PadNum, $( $IoSet),+ ) $( + $I2C )?,
103                    )+
104                }
105            );
106        )+
107    };
108}
109
110pad_table!(
111    #[hal_cfg("pa00")]
112    PA00 {
113        #[hal_cfg("sercom1")]
114        D: (Sercom1, Pad0, IoSet4),
115    }
116    #[hal_cfg("pa01")]
117    PA01 {
118        #[hal_cfg("sercom1")]
119        D: (Sercom1, Pad1, IoSet4),
120    }
121    #[hal_cfg("pa04")]
122    PA04 {
123        #[hal_cfg("sercom0")]
124        D: (Sercom0, Pad0, IoSet3),
125    }
126    #[hal_cfg("pa05")]
127    PA05 {
128        #[hal_cfg("sercom0")]
129        D: (Sercom0, Pad1, IoSet3),
130    }
131    #[hal_cfg("pa06")]
132    PA06 {
133        #[hal_cfg("sercom0")]
134        D: (Sercom0, Pad2, IoSet3),
135    }
136    #[hal_cfg("pa07")]
137    PA07 {
138        #[hal_cfg("sercom0")]
139        D: (Sercom0, Pad3, IoSet3),
140    }
141    #[hal_cfg("pa08")]
142    PA08 {
143        #[hal_cfg("sercom0")]
144        C: (Sercom0, Pad0, IoSet1) + I2C,
145        #[hal_cfg("sercom2")]
146        D: (Sercom2, Pad1, IoSet3) + I2C,
147    }
148    #[hal_cfg("pa09")]
149    PA09 {
150        #[hal_cfg("sercom0")]
151        C: (Sercom0, Pad1, IoSet1) + I2C,
152        #[hal_cfg("sercom2")]
153        D: (Sercom2, Pad0, IoSet3) + I2C,
154    }
155    #[hal_cfg("pa10")]
156    PA10 {
157        #[hal_cfg("sercom0")]
158        C: (Sercom0, Pad2, IoSet1),
159        #[hal_cfg("sercom2")]
160        D: (Sercom2, Pad2, IoSet3),
161    }
162    #[hal_cfg("pa11")]
163    PA11 {
164        #[hal_cfg("sercom0")]
165        C: (Sercom0, Pad3, IoSet1),
166        #[hal_cfg("sercom2")]
167        D: (Sercom2, Pad3, IoSet3),
168    }
169    #[hal_cfg("pa12")]
170    PA12 {
171        #[hal_cfg("sercom2")]
172        C: (Sercom2, Pad0, IoSet1) + I2C,
173        #[hal_cfg("sercom4")]
174        D: (Sercom4, Pad1, IoSet3) + I2C,
175    }
176    #[hal_cfg("pa13")]
177    PA13 {
178        #[hal_cfg("sercom2")]
179        C: (Sercom2, Pad1, IoSet1) + I2C,
180        #[hal_cfg("sercom4")]
181        D: (Sercom4, Pad0, IoSet3) + I2C,
182    }
183    #[hal_cfg("pa14")]
184    PA14 {
185        #[hal_cfg("sercom2")]
186        C: (Sercom2, Pad2, IoSet1),
187        #[hal_cfg("sercom4")]
188        D: (Sercom4, Pad2, IoSet3),
189    }
190    #[hal_cfg("pa15")]
191    PA15 {
192        #[hal_cfg("sercom2")]
193        C: (Sercom2, Pad3, IoSet1),
194        #[hal_cfg("sercom4")]
195        D: (Sercom4, Pad3, IoSet3),
196    }
197    #[hal_cfg("pa16")]
198    PA16 {
199        #[hal_cfg("sercom1")]
200        C: (Sercom1, Pad0, IoSet1) + I2C,
201        #[hal_cfg("sercom3")]
202        D: (Sercom3, Pad1, IoSet3) + I2C,
203    }
204    #[hal_cfg("pa17")]
205    PA17 {
206        #[hal_cfg("sercom1")]
207        C: (Sercom1, Pad1, IoSet1) + I2C,
208        #[hal_cfg("sercom3")]
209        D: (Sercom3, Pad0, IoSet3) + I2C,
210    }
211    #[hal_cfg("pa18")]
212    PA18 {
213        #[hal_cfg("sercom1")]
214        C: (Sercom1, Pad2, IoSet1),
215        #[hal_cfg("sercom3")]
216        D: (Sercom3, Pad2, IoSet3),
217    }
218    #[hal_cfg("pa19")]
219    PA19 {
220        #[hal_cfg("sercom1")]
221        C: (Sercom1, Pad3, IoSet1),
222        #[hal_cfg("sercom3")]
223        D: (Sercom3, Pad3, IoSet3),
224    }
225    #[hal_cfg("pa20")]
226    PA20 {
227        #[hal_cfg("sercom5")]
228        C: (Sercom5, Pad2, IoSet2),
229        #[hal_cfg("sercom3")]
230        D: (Sercom3, Pad2, IoSet2),
231    }
232    #[hal_cfg("pa21")]
233    PA21 {
234        #[hal_cfg("sercom5")]
235        C: (Sercom5, Pad3, IoSet2),
236        #[hal_cfg("sercom3")]
237        D: (Sercom3, Pad3, IoSet2),
238    }
239    #[hal_cfg("pa22")]
240    PA22 {
241        #[hal_cfg("sercom3")]
242        C: (Sercom3, Pad0, IoSet1) + I2C,
243        #[hal_cfg("sercom5")]
244        D: (Sercom5, Pad1, IoSet2, IoSet3, IoSet4) + I2C,
245    }
246    #[hal_cfg("pa23")]
247    PA23 {
248        #[hal_cfg("sercom3")]
249        C: (Sercom3, Pad1, IoSet1) + I2C,
250        #[hal_cfg("sercom5")]
251        D: (Sercom5, Pad0, IoSet2, IoSet3, IoSet4) + I2C,
252    }
253    #[hal_cfg("pa24")]
254    PA24 {
255        #[hal_cfg("sercom3")]
256        C: (Sercom3, Pad2, IoSet1),
257        #[hal_cfg("sercom5")]
258        D: (Sercom5, Pad2, IoSet3),
259    }
260    #[hal_cfg("pa25")]
261    PA25 {
262        #[hal_cfg("sercom3")]
263        C: (Sercom3, Pad3, IoSet1),
264        #[hal_cfg("sercom5")]
265        D: (Sercom5, Pad3, IoSet3),
266    }
267    #[hal_cfg("pa30")]
268    PA30 {
269        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
270        #[hal_cfg("sercom7")]
271        C: (Sercom7, Pad2, IoSet5),
272        #[hal_cfg("sercom1")]
273        D: (Sercom1, Pad2, IoSet4),
274    }
275    #[hal_cfg("pa31")]
276    PA31 {
277        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
278        #[hal_cfg("sercom7")]
279        C: (Sercom7, Pad3, IoSet5),
280        #[hal_cfg("sercom1")]
281        D: (Sercom1, Pad3, IoSet4),
282    }
283    #[hal_cfg("pb00")]
284    PB00 {
285        #[hal_cfg("sercom5")]
286        D: (Sercom5, Pad2, IoSet5, IoSet6),
287    }
288    #[hal_cfg("pb01")]
289    PB01 {
290        #[hal_cfg("sercom5")]
291        D: (Sercom5, Pad3, IoSet5, IoSet6),
292    }
293    #[hal_cfg("pb02")]
294    PB02 {
295        // According to Metro M4, PB02 is I2C-capable. This disagrees with datasheet table 6-8.
296        #[hal_cfg("sercom5")]
297        D: (Sercom5, Pad0, IoSet6) + I2C,
298    }
299    #[hal_cfg("pb03")]
300    PB03 {
301        // According to Metro M4, PB03 is I2C-capable. This disagrees with datasheet table 6-8.
302        #[hal_cfg("sercom5")]
303        D: (Sercom5, Pad1, IoSet6) + I2C,
304    }
305    #[hal_cfg("pb08")]
306    PB08 {
307        #[hal_cfg("sercom4")]
308        D: (Sercom4, Pad0, IoSet2),
309    }
310    #[hal_cfg("pb09")]
311    PB09 {
312        #[hal_cfg("sercom4")]
313        D: (Sercom4, Pad1, IoSet2),
314    }
315    #[hal_cfg("pb10")]
316    PB10 {
317        #[hal_cfg("sercom4")]
318        D: (Sercom4, Pad2, IoSet2),
319    }
320    #[hal_cfg("pb11")]
321    PB11 {
322        #[hal_cfg("sercom4")]
323        D: (Sercom4, Pad3, IoSet2),
324    }
325    #[hal_cfg("pb12")]
326    PB12 {
327        #[hal_cfg("sercom4")]
328        C: (Sercom4, Pad0, IoSet1),
329    }
330    #[hal_cfg("pb13")]
331    PB13 {
332        #[hal_cfg("sercom4")]
333        C: (Sercom4, Pad1, IoSet1),
334    }
335    #[hal_cfg("pb14")]
336    PB14 {
337        #[hal_cfg("sercom4")]
338        C: (Sercom4, Pad2, IoSet1),
339    }
340    #[hal_cfg("pb15")]
341    PB15 {
342        #[hal_cfg("sercom4")]
343        C: (Sercom4, Pad3, IoSet1),
344    }
345    #[hal_cfg("pb16")]
346    PB16 {
347        #[hal_cfg("sercom5")]
348        C: (Sercom5, Pad0, IoSet1),
349    }
350    #[hal_cfg("pb17")]
351    PB17 {
352        #[hal_cfg("sercom5")]
353        C: (Sercom5, Pad1, IoSet1),
354    }
355    #[hal_cfg("pb18")]
356    PB18 {
357        #[hal_cfg("sercom5")]
358        C: (Sercom5, Pad2, IoSet1),
359        #[hal_cfg("sercom7")]
360        D: (Sercom7, Pad2, IoSet4),
361    }
362    #[hal_cfg("pb19")]
363    PB19 {
364        #[hal_cfg("sercom5")]
365        C: (Sercom5, Pad3, IoSet1),
366        #[hal_cfg("sercom7")]
367        D: (Sercom7, Pad3, IoSet4),
368    }
369    #[hal_cfg("pb20")]
370    PB20 {
371        // According to Grand Central M4, PB20 is I2C-capable. This disagrees with datasheet
372        // table 6-8.
373        #[hal_cfg("sercom3")]
374        C: (Sercom3, Pad0, IoSet2) + I2C,
375        #[hal_cfg("sercom7")]
376        D: (Sercom7, Pad1, IoSet4),
377    }
378    #[hal_cfg("pb21")]
379    PB21 {
380        // According to Grand Central M4, PB21 is I2C-capable. This disagrees with datasheet
381        // table 6-8.
382        #[hal_cfg("sercom3")]
383        C: (Sercom3, Pad1, IoSet2) + I2C,
384        #[hal_cfg("sercom7")]
385        D: (Sercom7, Pad0, IoSet4),
386    }
387    #[hal_cfg("pb22")]
388    PB22 {
389        #[hal_cfg("sercom1")]
390        C: (Sercom1, Pad2, IoSet3),
391        #[hal_cfg("sercom5")]
392        D: (Sercom5, Pad2, IoSet4),
393    }
394    #[hal_cfg("pb23")]
395    PB23 {
396        #[hal_cfg("sercom1")]
397        C: (Sercom1, Pad3, IoSet3),
398        #[hal_cfg("sercom5")]
399        D: (Sercom5, Pad3, IoSet4),
400    }
401    #[hal_cfg("pb24")]
402    PB24 {
403        #[hal_cfg("sercom0")]
404        C: (Sercom0, Pad0, IoSet2),
405        #[hal_cfg("sercom2")]
406        D: (Sercom2, Pad1, IoSet4),
407    }
408    #[hal_cfg("pb25")]
409    PB25 {
410        #[hal_cfg("sercom0")]
411        C: (Sercom0, Pad1, IoSet2),
412        #[hal_cfg("sercom2")]
413        D: (Sercom2, Pad0, IoSet4),
414    }
415    #[hal_cfg("pb26")]
416    PB26 {
417        #[hal_cfg("sercom2")]
418        C: (Sercom2, Pad0, IoSet2),
419        #[hal_cfg("sercom4")]
420        D: (Sercom4, Pad1, IoSet4),
421    }
422    #[hal_cfg("pb27")]
423    PB27 {
424        #[hal_cfg("sercom2")]
425        C: (Sercom2, Pad1, IoSet2),
426        #[hal_cfg("sercom4")]
427        D: (Sercom4, Pad0, IoSet4),
428    }
429    #[hal_cfg("pb28")]
430    PB28 {
431        #[hal_cfg("sercom2")]
432        C: (Sercom2, Pad2, IoSet2),
433        #[hal_cfg("sercom4")]
434        D: (Sercom4, Pad2, IoSet4),
435    }
436    #[hal_cfg("pb29")]
437    PB29 {
438        #[hal_cfg("sercom2")]
439        C: (Sercom2, Pad3, IoSet2),
440        #[hal_cfg("sercom4")]
441        D: (Sercom4, Pad3, IoSet4),
442    }
443    #[hal_cfg("pb30")]
444    PB30 {
445        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
446        #[hal_cfg("sercom7")]
447        C: (Sercom7, Pad0, IoSet5),
448        #[hal_cfg("sercom5")]
449        D: (Sercom5, Pad1, IoSet5),
450    }
451    #[hal_cfg("pb31")]
452    PB31 {
453        // Pin table in 6.1 does not mention function C, but sercom table in 6.2.8.1 does
454        #[hal_cfg("sercom7")]
455        C: (Sercom7, Pad1, IoSet5),
456        #[hal_cfg("sercom5")]
457        D: (Sercom5, Pad0, IoSet5),
458    }
459    #[hal_cfg("pc04")]
460    PC04 {
461        #[hal_cfg("sercom6")]
462        C: (Sercom6, Pad0, IoSet2),
463    }
464    #[hal_cfg("pc05")]
465    PC05 {
466        #[hal_cfg("sercom6")]
467        C: (Sercom6, Pad1, IoSet2),
468    }
469    #[hal_cfg("pc06")]
470    PC06 {
471        #[hal_cfg("sercom6")]
472        C: (Sercom6, Pad2, IoSet2),
473    }
474    #[hal_cfg("pc07")]
475    PC07 {
476        #[hal_cfg("sercom6")]
477        C: (Sercom6, Pad3, IoSet2),
478    }
479    #[hal_cfg("pc10")]
480    PC10 {
481        #[hal_cfg("sercom6")]
482        C: (Sercom6, Pad2, IoSet5),
483        #[hal_cfg("sercom7")]
484        D: (Sercom7, Pad2, IoSet3),
485    }
486    #[hal_cfg("pc11")]
487    PC11 {
488        #[hal_cfg("sercom6")]
489        C: (Sercom6, Pad3, IoSet5),
490        #[hal_cfg("sercom7")]
491        D: (Sercom7, Pad3, IoSet3),
492    }
493    #[hal_cfg("pc12")]
494    PC12 {
495        #[hal_cfg("sercom7")]
496        C: (Sercom7, Pad0, IoSet1, IoSet3),
497        #[hal_cfg("sercom6")]
498        D: (Sercom6, Pad1, IoSet4, IoSet5),
499    }
500    #[hal_cfg("pc13")]
501    PC13 {
502        #[hal_cfg("sercom7")]
503        C: (Sercom7, Pad1, IoSet1, IoSet3),
504        #[hal_cfg("sercom6")]
505        D: (Sercom6, Pad0, IoSet4, IoSet5),
506    }
507    #[hal_cfg("pc14")]
508    PC14 {
509        #[hal_cfg("sercom7")]
510        C: (Sercom7, Pad2, IoSet1),
511        #[hal_cfg("sercom6")]
512        D: (Sercom6, Pad2, IoSet4),
513    }
514    #[hal_cfg("pc15")]
515    PC15 {
516        #[hal_cfg("sercom7")]
517        C: (Sercom7, Pad3, IoSet1),
518        #[hal_cfg("sercom6")]
519        D: (Sercom6, Pad3, IoSet4),
520    }
521    #[hal_cfg("pc16")]
522    PC16 {
523        #[hal_cfg("sercom6")]
524        C: (Sercom6, Pad0, IoSet1),
525        #[hal_cfg("sercom0")]
526        D: (Sercom0, Pad1, IoSet4),
527    }
528    #[hal_cfg("pc17")]
529    PC17 {
530        #[hal_cfg("sercom6")]
531        C: (Sercom6, Pad1, IoSet1),
532        #[hal_cfg("sercom0")]
533        D: (Sercom0, Pad0, IoSet4),
534    }
535    #[hal_cfg("pc18")]
536    PC18 {
537        #[hal_cfg("sercom6")]
538        C: (Sercom6, Pad2, IoSet1),
539        #[hal_cfg("sercom0")]
540        D: (Sercom0, Pad2, IoSet4),
541    }
542    #[hal_cfg("pc19")]
543    PC19 {
544        #[hal_cfg("sercom6")]
545        C: (Sercom6, Pad3, IoSet1),
546        #[hal_cfg("sercom0")]
547        D: (Sercom0, Pad3, IoSet4),
548    }
549    #[hal_cfg("pc22")]
550    PC22 {
551        #[hal_cfg("sercom1")]
552        C: (Sercom1, Pad0, IoSet2),
553        #[hal_cfg("sercom3")]
554        D: (Sercom3, Pad1, IoSet4),
555    }
556    #[hal_cfg("pc23")]
557    PC23 {
558        #[hal_cfg("sercom1")]
559        C: (Sercom1, Pad1, IoSet2),
560        #[hal_cfg("sercom3")]
561        D: (Sercom3, Pad0, IoSet4),
562    }
563    #[hal_cfg("pc24")]
564    PC24 {
565        #[hal_cfg("sercom0")]
566        C: (Sercom0, Pad2, IoSet2),
567        #[hal_cfg("sercom2")]
568        D: (Sercom2, Pad2, IoSet4),
569    }
570    #[hal_cfg("pc25")]
571    PC25 {
572        #[hal_cfg("sercom0")]
573        C: (Sercom0, Pad3, IoSet2),
574        #[hal_cfg("sercom2")]
575        D: (Sercom2, Pad3, IoSet4),
576    }
577    #[hal_cfg("pc27")]
578    PC27 {
579        #[hal_cfg("sercom1")]
580        C: (Sercom1, Pad0, IoSet3),
581    }
582    #[hal_cfg("pc28")]
583    PC28 {
584        #[hal_cfg("sercom1")]
585        C: (Sercom1, Pad1, IoSet3),
586    }
587    #[hal_cfg("pd08")]
588    PD08 {
589        #[hal_cfg("sercom7")]
590        C: (Sercom7, Pad0, IoSet2) + I2C,
591        #[hal_cfg("sercom6")]
592        D: (Sercom6, Pad1, IoSet3) + I2C,
593    }
594    #[hal_cfg("pd09")]
595    PD09 {
596        #[hal_cfg("sercom7")]
597        C: (Sercom7, Pad1, IoSet2) + I2C,
598        #[hal_cfg("sercom6")]
599        D: (Sercom6, Pad0, IoSet3) + I2C,
600    }
601    #[hal_cfg("pd10")]
602    PD10 {
603        #[hal_cfg("sercom7")]
604        C: (Sercom7, Pad2, IoSet2),
605        #[hal_cfg("sercom6")]
606        D: (Sercom6, Pad2, IoSet3),
607    }
608    #[hal_cfg("pd11")]
609    PD11 {
610        #[hal_cfg("sercom7")]
611        C: (Sercom7, Pad3, IoSet2),
612        #[hal_cfg("sercom6")]
613        D: (Sercom6, Pad3, IoSet3),
614    }
615    #[hal_cfg("pd20")]
616    PD20 {
617        #[hal_cfg("sercom1")]
618        C: (Sercom1, Pad2, IoSet2),
619        #[hal_cfg("sercom3")]
620        D: (Sercom3, Pad2, IoSet4),
621    }
622    #[hal_cfg("pd21")]
623    PD21 {
624        #[hal_cfg("sercom1")]
625        C: (Sercom1, Pad3, IoSet2),
626        #[hal_cfg("sercom3")]
627        D: (Sercom3, Pad3, IoSet4),
628    }
629);
630
631// Implement an undocumented `IoSet` for PA16, PA17, PB22 & PB23 configured for
632// `Sercom1`. The pygamer & feather_m4 uses this combination, but it is not
633// listed as valid in the datasheet.
634impl InIoSet<UndocIoSet1> for Pin<PA16, Alternate<C>> {}
635impl InIoSet<UndocIoSet1> for Pin<PA17, Alternate<C>> {}
636impl InIoSet<UndocIoSet1> for Pin<PB22, Alternate<C>> {}
637impl InIoSet<UndocIoSet1> for Pin<PB23, Alternate<C>> {}
638
639// Implement an undocumented `IoSet` for PA00, PA01, PB22 & PB23 configured for
640// `Sercom1`. The itsybitsy_m4 uses this combination, but it is not
641// listed as valid in the datasheet.
642impl InIoSet<UndocIoSet2> for Pin<PA00, Alternate<D>> {}
643impl InIoSet<UndocIoSet2> for Pin<PA01, Alternate<D>> {}
644impl InIoSet<UndocIoSet2> for Pin<PB22, Alternate<C>> {}
645impl InIoSet<UndocIoSet2> for Pin<PB23, Alternate<C>> {}
atsamd_hal/sercom/pad/impl_pad_thumbv7em.rs

atsamd_hal/sercom/pad/
impl_pad_thumbv7em.rs
