atsamd51j/mclk/
apbdmask.rs

1#[doc = "Register `APBDMASK` reader"]
2pub type R = crate::R<ApbdmaskSpec>;
3#[doc = "Register `APBDMASK` writer"]
4pub type W = crate::W<ApbdmaskSpec>;
5#[doc = "Field `SERCOM4_` reader - SERCOM4 APB Clock Enable"]
6pub type Sercom4_R = crate::BitReader;
7#[doc = "Field `SERCOM4_` writer - SERCOM4 APB Clock Enable"]
8pub type Sercom4_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SERCOM5_` reader - SERCOM5 APB Clock Enable"]
10pub type Sercom5_R = crate::BitReader;
11#[doc = "Field `SERCOM5_` writer - SERCOM5 APB Clock Enable"]
12pub type Sercom5_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TCC4_` reader - TCC4 APB Clock Enable"]
14pub type Tcc4_R = crate::BitReader;
15#[doc = "Field `TCC4_` writer - TCC4 APB Clock Enable"]
16pub type Tcc4_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ADC0_` reader - ADC0 APB Clock Enable"]
18pub type Adc0_R = crate::BitReader;
19#[doc = "Field `ADC0_` writer - ADC0 APB Clock Enable"]
20pub type Adc0_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `ADC1_` reader - ADC1 APB Clock Enable"]
22pub type Adc1_R = crate::BitReader;
23#[doc = "Field `ADC1_` writer - ADC1 APB Clock Enable"]
24pub type Adc1_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `DAC_` reader - DAC APB Clock Enable"]
26pub type Dac_R = crate::BitReader;
27#[doc = "Field `DAC_` writer - DAC APB Clock Enable"]
28pub type Dac_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `I2S_` reader - I2S APB Clock Enable"]
30pub type I2s_R = crate::BitReader;
31#[doc = "Field `I2S_` writer - I2S APB Clock Enable"]
32pub type I2s_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PCC_` reader - PCC APB Clock Enable"]
34pub type Pcc_R = crate::BitReader;
35#[doc = "Field `PCC_` writer - PCC APB Clock Enable"]
36pub type Pcc_W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38    #[doc = "Bit 0 - SERCOM4 APB Clock Enable"]
39    #[inline(always)]
40    pub fn sercom4_(&self) -> Sercom4_R {
41        Sercom4_R::new((self.bits & 1) != 0)
42    }
43    #[doc = "Bit 1 - SERCOM5 APB Clock Enable"]
44    #[inline(always)]
45    pub fn sercom5_(&self) -> Sercom5_R {
46        Sercom5_R::new(((self.bits >> 1) & 1) != 0)
47    }
48    #[doc = "Bit 4 - TCC4 APB Clock Enable"]
49    #[inline(always)]
50    pub fn tcc4_(&self) -> Tcc4_R {
51        Tcc4_R::new(((self.bits >> 4) & 1) != 0)
52    }
53    #[doc = "Bit 7 - ADC0 APB Clock Enable"]
54    #[inline(always)]
55    pub fn adc0_(&self) -> Adc0_R {
56        Adc0_R::new(((self.bits >> 7) & 1) != 0)
57    }
58    #[doc = "Bit 8 - ADC1 APB Clock Enable"]
59    #[inline(always)]
60    pub fn adc1_(&self) -> Adc1_R {
61        Adc1_R::new(((self.bits >> 8) & 1) != 0)
62    }
63    #[doc = "Bit 9 - DAC APB Clock Enable"]
64    #[inline(always)]
65    pub fn dac_(&self) -> Dac_R {
66        Dac_R::new(((self.bits >> 9) & 1) != 0)
67    }
68    #[doc = "Bit 10 - I2S APB Clock Enable"]
69    #[inline(always)]
70    pub fn i2s_(&self) -> I2s_R {
71        I2s_R::new(((self.bits >> 10) & 1) != 0)
72    }
73    #[doc = "Bit 11 - PCC APB Clock Enable"]
74    #[inline(always)]
75    pub fn pcc_(&self) -> Pcc_R {
76        Pcc_R::new(((self.bits >> 11) & 1) != 0)
77    }
78}
79impl W {
80    #[doc = "Bit 0 - SERCOM4 APB Clock Enable"]
81    #[inline(always)]
82    #[must_use]
83    pub fn sercom4_(&mut self) -> Sercom4_W<ApbdmaskSpec> {
84        Sercom4_W::new(self, 0)
85    }
86    #[doc = "Bit 1 - SERCOM5 APB Clock Enable"]
87    #[inline(always)]
88    #[must_use]
89    pub fn sercom5_(&mut self) -> Sercom5_W<ApbdmaskSpec> {
90        Sercom5_W::new(self, 1)
91    }
92    #[doc = "Bit 4 - TCC4 APB Clock Enable"]
93    #[inline(always)]
94    #[must_use]
95    pub fn tcc4_(&mut self) -> Tcc4_W<ApbdmaskSpec> {
96        Tcc4_W::new(self, 4)
97    }
98    #[doc = "Bit 7 - ADC0 APB Clock Enable"]
99    #[inline(always)]
100    #[must_use]
101    pub fn adc0_(&mut self) -> Adc0_W<ApbdmaskSpec> {
102        Adc0_W::new(self, 7)
103    }
104    #[doc = "Bit 8 - ADC1 APB Clock Enable"]
105    #[inline(always)]
106    #[must_use]
107    pub fn adc1_(&mut self) -> Adc1_W<ApbdmaskSpec> {
108        Adc1_W::new(self, 8)
109    }
110    #[doc = "Bit 9 - DAC APB Clock Enable"]
111    #[inline(always)]
112    #[must_use]
113    pub fn dac_(&mut self) -> Dac_W<ApbdmaskSpec> {
114        Dac_W::new(self, 9)
115    }
116    #[doc = "Bit 10 - I2S APB Clock Enable"]
117    #[inline(always)]
118    #[must_use]
119    pub fn i2s_(&mut self) -> I2s_W<ApbdmaskSpec> {
120        I2s_W::new(self, 10)
121    }
122    #[doc = "Bit 11 - PCC APB Clock Enable"]
123    #[inline(always)]
124    #[must_use]
125    pub fn pcc_(&mut self) -> Pcc_W<ApbdmaskSpec> {
126        Pcc_W::new(self, 11)
127    }
128}
129#[doc = "APBD Mask\n\nYou can [`read`](crate::Reg::read) this register and get [`apbdmask::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apbdmask::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
130pub struct ApbdmaskSpec;
131impl crate::RegisterSpec for ApbdmaskSpec {
132    type Ux = u32;
133}
134#[doc = "`read()` method returns [`apbdmask::R`](R) reader structure"]
135impl crate::Readable for ApbdmaskSpec {}
136#[doc = "`write(|w| ..)` method takes [`apbdmask::W`](W) writer structure"]
137impl crate::Writable for ApbdmaskSpec {
138    type Safety = crate::Unsafe;
139    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
140    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
141}
142#[doc = "`reset()` method sets APBDMASK to value 0"]
143impl crate::Resettable for ApbdmaskSpec {
144    const RESET_VALUE: u32 = 0;
145}
atsamd51j/mclk/apbdmask.rs

atsamd51j/mclk/
apbdmask.rs
