atsamd51j/eic/
nmictrl.rs

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1#[doc = "Register `NMICTRL` reader"]
2pub type R = crate::R<NmictrlSpec>;
3#[doc = "Register `NMICTRL` writer"]
4pub type W = crate::W<NmictrlSpec>;
5#[doc = "Non-Maskable Interrupt Sense Configuration\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Nmisenseselect {
9    #[doc = "0: No detection"]
10    None = 0,
11    #[doc = "1: Rising-edge detection"]
12    Rise = 1,
13    #[doc = "2: Falling-edge detection"]
14    Fall = 2,
15    #[doc = "3: Both-edges detection"]
16    Both = 3,
17    #[doc = "4: High-level detection"]
18    High = 4,
19    #[doc = "5: Low-level detection"]
20    Low = 5,
21}
22impl From<Nmisenseselect> for u8 {
23    #[inline(always)]
24    fn from(variant: Nmisenseselect) -> Self {
25        variant as _
26    }
27}
28impl crate::FieldSpec for Nmisenseselect {
29    type Ux = u8;
30}
31impl crate::IsEnum for Nmisenseselect {}
32#[doc = "Field `NMISENSE` reader - Non-Maskable Interrupt Sense Configuration"]
33pub type NmisenseR = crate::FieldReader<Nmisenseselect>;
34impl NmisenseR {
35    #[doc = "Get enumerated values variant"]
36    #[inline(always)]
37    pub const fn variant(&self) -> Option<Nmisenseselect> {
38        match self.bits {
39            0 => Some(Nmisenseselect::None),
40            1 => Some(Nmisenseselect::Rise),
41            2 => Some(Nmisenseselect::Fall),
42            3 => Some(Nmisenseselect::Both),
43            4 => Some(Nmisenseselect::High),
44            5 => Some(Nmisenseselect::Low),
45            _ => None,
46        }
47    }
48    #[doc = "No detection"]
49    #[inline(always)]
50    pub fn is_none(&self) -> bool {
51        *self == Nmisenseselect::None
52    }
53    #[doc = "Rising-edge detection"]
54    #[inline(always)]
55    pub fn is_rise(&self) -> bool {
56        *self == Nmisenseselect::Rise
57    }
58    #[doc = "Falling-edge detection"]
59    #[inline(always)]
60    pub fn is_fall(&self) -> bool {
61        *self == Nmisenseselect::Fall
62    }
63    #[doc = "Both-edges detection"]
64    #[inline(always)]
65    pub fn is_both(&self) -> bool {
66        *self == Nmisenseselect::Both
67    }
68    #[doc = "High-level detection"]
69    #[inline(always)]
70    pub fn is_high(&self) -> bool {
71        *self == Nmisenseselect::High
72    }
73    #[doc = "Low-level detection"]
74    #[inline(always)]
75    pub fn is_low(&self) -> bool {
76        *self == Nmisenseselect::Low
77    }
78}
79#[doc = "Field `NMISENSE` writer - Non-Maskable Interrupt Sense Configuration"]
80pub type NmisenseW<'a, REG> = crate::FieldWriter<'a, REG, 3, Nmisenseselect>;
81impl<'a, REG> NmisenseW<'a, REG>
82where
83    REG: crate::Writable + crate::RegisterSpec,
84    REG::Ux: From<u8>,
85{
86    #[doc = "No detection"]
87    #[inline(always)]
88    pub fn none(self) -> &'a mut crate::W<REG> {
89        self.variant(Nmisenseselect::None)
90    }
91    #[doc = "Rising-edge detection"]
92    #[inline(always)]
93    pub fn rise(self) -> &'a mut crate::W<REG> {
94        self.variant(Nmisenseselect::Rise)
95    }
96    #[doc = "Falling-edge detection"]
97    #[inline(always)]
98    pub fn fall(self) -> &'a mut crate::W<REG> {
99        self.variant(Nmisenseselect::Fall)
100    }
101    #[doc = "Both-edges detection"]
102    #[inline(always)]
103    pub fn both(self) -> &'a mut crate::W<REG> {
104        self.variant(Nmisenseselect::Both)
105    }
106    #[doc = "High-level detection"]
107    #[inline(always)]
108    pub fn high(self) -> &'a mut crate::W<REG> {
109        self.variant(Nmisenseselect::High)
110    }
111    #[doc = "Low-level detection"]
112    #[inline(always)]
113    pub fn low(self) -> &'a mut crate::W<REG> {
114        self.variant(Nmisenseselect::Low)
115    }
116}
117#[doc = "Field `NMIFILTEN` reader - Non-Maskable Interrupt Filter Enable"]
118pub type NmifiltenR = crate::BitReader;
119#[doc = "Field `NMIFILTEN` writer - Non-Maskable Interrupt Filter Enable"]
120pub type NmifiltenW<'a, REG> = crate::BitWriter<'a, REG>;
121#[doc = "Asynchronous Edge Detection Mode\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq, Eq)]
123pub enum Nmiasynchselect {
124    #[doc = "0: Edge detection is clock synchronously operated"]
125    Sync = 0,
126    #[doc = "1: Edge detection is clock asynchronously operated"]
127    Async = 1,
128}
129impl From<Nmiasynchselect> for bool {
130    #[inline(always)]
131    fn from(variant: Nmiasynchselect) -> Self {
132        variant as u8 != 0
133    }
134}
135#[doc = "Field `NMIASYNCH` reader - Asynchronous Edge Detection Mode"]
136pub type NmiasynchR = crate::BitReader<Nmiasynchselect>;
137impl NmiasynchR {
138    #[doc = "Get enumerated values variant"]
139    #[inline(always)]
140    pub const fn variant(&self) -> Nmiasynchselect {
141        match self.bits {
142            false => Nmiasynchselect::Sync,
143            true => Nmiasynchselect::Async,
144        }
145    }
146    #[doc = "Edge detection is clock synchronously operated"]
147    #[inline(always)]
148    pub fn is_sync(&self) -> bool {
149        *self == Nmiasynchselect::Sync
150    }
151    #[doc = "Edge detection is clock asynchronously operated"]
152    #[inline(always)]
153    pub fn is_async(&self) -> bool {
154        *self == Nmiasynchselect::Async
155    }
156}
157#[doc = "Field `NMIASYNCH` writer - Asynchronous Edge Detection Mode"]
158pub type NmiasynchW<'a, REG> = crate::BitWriter<'a, REG, Nmiasynchselect>;
159impl<'a, REG> NmiasynchW<'a, REG>
160where
161    REG: crate::Writable + crate::RegisterSpec,
162{
163    #[doc = "Edge detection is clock synchronously operated"]
164    #[inline(always)]
165    pub fn sync(self) -> &'a mut crate::W<REG> {
166        self.variant(Nmiasynchselect::Sync)
167    }
168    #[doc = "Edge detection is clock asynchronously operated"]
169    #[inline(always)]
170    pub fn async_(self) -> &'a mut crate::W<REG> {
171        self.variant(Nmiasynchselect::Async)
172    }
173}
174impl R {
175    #[doc = "Bits 0:2 - Non-Maskable Interrupt Sense Configuration"]
176    #[inline(always)]
177    pub fn nmisense(&self) -> NmisenseR {
178        NmisenseR::new(self.bits & 7)
179    }
180    #[doc = "Bit 3 - Non-Maskable Interrupt Filter Enable"]
181    #[inline(always)]
182    pub fn nmifilten(&self) -> NmifiltenR {
183        NmifiltenR::new(((self.bits >> 3) & 1) != 0)
184    }
185    #[doc = "Bit 4 - Asynchronous Edge Detection Mode"]
186    #[inline(always)]
187    pub fn nmiasynch(&self) -> NmiasynchR {
188        NmiasynchR::new(((self.bits >> 4) & 1) != 0)
189    }
190}
191impl W {
192    #[doc = "Bits 0:2 - Non-Maskable Interrupt Sense Configuration"]
193    #[inline(always)]
194    #[must_use]
195    pub fn nmisense(&mut self) -> NmisenseW<NmictrlSpec> {
196        NmisenseW::new(self, 0)
197    }
198    #[doc = "Bit 3 - Non-Maskable Interrupt Filter Enable"]
199    #[inline(always)]
200    #[must_use]
201    pub fn nmifilten(&mut self) -> NmifiltenW<NmictrlSpec> {
202        NmifiltenW::new(self, 3)
203    }
204    #[doc = "Bit 4 - Asynchronous Edge Detection Mode"]
205    #[inline(always)]
206    #[must_use]
207    pub fn nmiasynch(&mut self) -> NmiasynchW<NmictrlSpec> {
208        NmiasynchW::new(self, 4)
209    }
210}
211#[doc = "Non-Maskable Interrupt Control\n\nYou can [`read`](crate::Reg::read) this register and get [`nmictrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`nmictrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
212pub struct NmictrlSpec;
213impl crate::RegisterSpec for NmictrlSpec {
214    type Ux = u8;
215}
216#[doc = "`read()` method returns [`nmictrl::R`](R) reader structure"]
217impl crate::Readable for NmictrlSpec {}
218#[doc = "`write(|w| ..)` method takes [`nmictrl::W`](W) writer structure"]
219impl crate::Writable for NmictrlSpec {
220    type Safety = crate::Unsafe;
221    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
222    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
223}
224#[doc = "`reset()` method sets NMICTRL to value 0"]
225impl crate::Resettable for NmictrlSpec {
226    const RESET_VALUE: u8 = 0;
227}
atsamd51j/eic/nmictrl.rs

atsamd51j/eic/
nmictrl.rs
