atsamd51j/sercom0/i2cm/
ctrlc.rs

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1#[doc = "Register `CTRLC` reader"]
2pub type R = crate::R<CtrlcSpec>;
3#[doc = "Register `CTRLC` writer"]
4pub type W = crate::W<CtrlcSpec>;
5#[doc = "Data 32 Bit\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7pub enum Data32bselect {
8    #[doc = "0: Data transaction from/to DATA register are 8-bit"]
9    DataTrans8bit = 0,
10    #[doc = "1: Data transaction from/to DATA register are 32-bit"]
11    DataTrans32bit = 1,
12}
13impl From<Data32bselect> for bool {
14    #[inline(always)]
15    fn from(variant: Data32bselect) -> Self {
16        variant as u8 != 0
17    }
18}
19#[doc = "Field `DATA32B` reader - Data 32 Bit"]
20pub type Data32bR = crate::BitReader<Data32bselect>;
21impl Data32bR {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> Data32bselect {
25        match self.bits {
26            false => Data32bselect::DataTrans8bit,
27            true => Data32bselect::DataTrans32bit,
28        }
29    }
30    #[doc = "Data transaction from/to DATA register are 8-bit"]
31    #[inline(always)]
32    pub fn is_data_trans_8bit(&self) -> bool {
33        *self == Data32bselect::DataTrans8bit
34    }
35    #[doc = "Data transaction from/to DATA register are 32-bit"]
36    #[inline(always)]
37    pub fn is_data_trans_32bit(&self) -> bool {
38        *self == Data32bselect::DataTrans32bit
39    }
40}
41#[doc = "Field `DATA32B` writer - Data 32 Bit"]
42pub type Data32bW<'a, REG> = crate::BitWriter<'a, REG, Data32bselect>;
43impl<'a, REG> Data32bW<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Data transaction from/to DATA register are 8-bit"]
48    #[inline(always)]
49    pub fn data_trans_8bit(self) -> &'a mut crate::W<REG> {
50        self.variant(Data32bselect::DataTrans8bit)
51    }
52    #[doc = "Data transaction from/to DATA register are 32-bit"]
53    #[inline(always)]
54    pub fn data_trans_32bit(self) -> &'a mut crate::W<REG> {
55        self.variant(Data32bselect::DataTrans32bit)
56    }
57}
58impl R {
59    #[doc = "Bit 24 - Data 32 Bit"]
60    #[inline(always)]
61    pub fn data32b(&self) -> Data32bR {
62        Data32bR::new(((self.bits >> 24) & 1) != 0)
63    }
64}
65impl W {
66    #[doc = "Bit 24 - Data 32 Bit"]
67    #[inline(always)]
68    #[must_use]
69    pub fn data32b(&mut self) -> Data32bW<CtrlcSpec> {
70        Data32bW::new(self, 24)
71    }
72}
73#[doc = "I2CM Control C\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrlc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrlc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
74pub struct CtrlcSpec;
75impl crate::RegisterSpec for CtrlcSpec {
76    type Ux = u32;
77}
78#[doc = "`read()` method returns [`ctrlc::R`](R) reader structure"]
79impl crate::Readable for CtrlcSpec {}
80#[doc = "`write(|w| ..)` method takes [`ctrlc::W`](W) writer structure"]
81impl crate::Writable for CtrlcSpec {
82    type Safety = crate::Unsafe;
83    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
84    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
85}
86#[doc = "`reset()` method sets CTRLC to value 0"]
87impl crate::Resettable for CtrlcSpec {
88    const RESET_VALUE: u32 = 0;
89}
atsamd51j/sercom0/i2cm/ctrlc.rs

atsamd51j/sercom0/i2cm/
ctrlc.rs
