atsamd51j/tc0/count8/
ctrla.rs

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1#[doc = "Register `CTRLA` reader"]
2pub type R = crate::R<CtrlaSpec>;
3#[doc = "Register `CTRLA` writer"]
4pub type W = crate::W<CtrlaSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ENABLE` reader - Enable"]
10pub type EnableR = crate::BitReader;
11#[doc = "Field `ENABLE` writer - Enable"]
12pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Timer Counter Mode\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum Modeselect {
17    #[doc = "0: Counter in 16-bit mode"]
18    Count16 = 0,
19    #[doc = "1: Counter in 8-bit mode"]
20    Count8 = 1,
21    #[doc = "2: Counter in 32-bit mode"]
22    Count32 = 2,
23}
24impl From<Modeselect> for u8 {
25    #[inline(always)]
26    fn from(variant: Modeselect) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for Modeselect {
31    type Ux = u8;
32}
33impl crate::IsEnum for Modeselect {}
34#[doc = "Field `MODE` reader - Timer Counter Mode"]
35pub type ModeR = crate::FieldReader<Modeselect>;
36impl ModeR {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub const fn variant(&self) -> Option<Modeselect> {
40        match self.bits {
41            0 => Some(Modeselect::Count16),
42            1 => Some(Modeselect::Count8),
43            2 => Some(Modeselect::Count32),
44            _ => None,
45        }
46    }
47    #[doc = "Counter in 16-bit mode"]
48    #[inline(always)]
49    pub fn is_count16(&self) -> bool {
50        *self == Modeselect::Count16
51    }
52    #[doc = "Counter in 8-bit mode"]
53    #[inline(always)]
54    pub fn is_count8(&self) -> bool {
55        *self == Modeselect::Count8
56    }
57    #[doc = "Counter in 32-bit mode"]
58    #[inline(always)]
59    pub fn is_count32(&self) -> bool {
60        *self == Modeselect::Count32
61    }
62}
63#[doc = "Field `MODE` writer - Timer Counter Mode"]
64pub type ModeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Modeselect>;
65impl<'a, REG> ModeW<'a, REG>
66where
67    REG: crate::Writable + crate::RegisterSpec,
68    REG::Ux: From<u8>,
69{
70    #[doc = "Counter in 16-bit mode"]
71    #[inline(always)]
72    pub fn count16(self) -> &'a mut crate::W<REG> {
73        self.variant(Modeselect::Count16)
74    }
75    #[doc = "Counter in 8-bit mode"]
76    #[inline(always)]
77    pub fn count8(self) -> &'a mut crate::W<REG> {
78        self.variant(Modeselect::Count8)
79    }
80    #[doc = "Counter in 32-bit mode"]
81    #[inline(always)]
82    pub fn count32(self) -> &'a mut crate::W<REG> {
83        self.variant(Modeselect::Count32)
84    }
85}
86#[doc = "Prescaler and Counter Synchronization\n\nValue on reset: 0"]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88#[repr(u8)]
89pub enum Prescsyncselect {
90    #[doc = "0: Reload or reset the counter on next generic clock"]
91    Gclk = 0,
92    #[doc = "1: Reload or reset the counter on next prescaler clock"]
93    Presc = 1,
94    #[doc = "2: Reload or reset the counter on next generic clock and reset the prescaler counter"]
95    Resync = 2,
96}
97impl From<Prescsyncselect> for u8 {
98    #[inline(always)]
99    fn from(variant: Prescsyncselect) -> Self {
100        variant as _
101    }
102}
103impl crate::FieldSpec for Prescsyncselect {
104    type Ux = u8;
105}
106impl crate::IsEnum for Prescsyncselect {}
107#[doc = "Field `PRESCSYNC` reader - Prescaler and Counter Synchronization"]
108pub type PrescsyncR = crate::FieldReader<Prescsyncselect>;
109impl PrescsyncR {
110    #[doc = "Get enumerated values variant"]
111    #[inline(always)]
112    pub const fn variant(&self) -> Option<Prescsyncselect> {
113        match self.bits {
114            0 => Some(Prescsyncselect::Gclk),
115            1 => Some(Prescsyncselect::Presc),
116            2 => Some(Prescsyncselect::Resync),
117            _ => None,
118        }
119    }
120    #[doc = "Reload or reset the counter on next generic clock"]
121    #[inline(always)]
122    pub fn is_gclk(&self) -> bool {
123        *self == Prescsyncselect::Gclk
124    }
125    #[doc = "Reload or reset the counter on next prescaler clock"]
126    #[inline(always)]
127    pub fn is_presc(&self) -> bool {
128        *self == Prescsyncselect::Presc
129    }
130    #[doc = "Reload or reset the counter on next generic clock and reset the prescaler counter"]
131    #[inline(always)]
132    pub fn is_resync(&self) -> bool {
133        *self == Prescsyncselect::Resync
134    }
135}
136#[doc = "Field `PRESCSYNC` writer - Prescaler and Counter Synchronization"]
137pub type PrescsyncW<'a, REG> = crate::FieldWriter<'a, REG, 2, Prescsyncselect>;
138impl<'a, REG> PrescsyncW<'a, REG>
139where
140    REG: crate::Writable + crate::RegisterSpec,
141    REG::Ux: From<u8>,
142{
143    #[doc = "Reload or reset the counter on next generic clock"]
144    #[inline(always)]
145    pub fn gclk(self) -> &'a mut crate::W<REG> {
146        self.variant(Prescsyncselect::Gclk)
147    }
148    #[doc = "Reload or reset the counter on next prescaler clock"]
149    #[inline(always)]
150    pub fn presc(self) -> &'a mut crate::W<REG> {
151        self.variant(Prescsyncselect::Presc)
152    }
153    #[doc = "Reload or reset the counter on next generic clock and reset the prescaler counter"]
154    #[inline(always)]
155    pub fn resync(self) -> &'a mut crate::W<REG> {
156        self.variant(Prescsyncselect::Resync)
157    }
158}
159#[doc = "Field `RUNSTDBY` reader - Run during Standby"]
160pub type RunstdbyR = crate::BitReader;
161#[doc = "Field `RUNSTDBY` writer - Run during Standby"]
162pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
163#[doc = "Field `ONDEMAND` reader - Clock On Demand"]
164pub type OndemandR = crate::BitReader;
165#[doc = "Field `ONDEMAND` writer - Clock On Demand"]
166pub type OndemandW<'a, REG> = crate::BitWriter<'a, REG>;
167#[doc = "Prescaler\n\nValue on reset: 0"]
168#[derive(Clone, Copy, Debug, PartialEq, Eq)]
169#[repr(u8)]
170pub enum Prescalerselect {
171    #[doc = "0: Prescaler: GCLK_TC"]
172    Div1 = 0,
173    #[doc = "1: Prescaler: GCLK_TC/2"]
174    Div2 = 1,
175    #[doc = "2: Prescaler: GCLK_TC/4"]
176    Div4 = 2,
177    #[doc = "3: Prescaler: GCLK_TC/8"]
178    Div8 = 3,
179    #[doc = "4: Prescaler: GCLK_TC/16"]
180    Div16 = 4,
181    #[doc = "5: Prescaler: GCLK_TC/64"]
182    Div64 = 5,
183    #[doc = "6: Prescaler: GCLK_TC/256"]
184    Div256 = 6,
185    #[doc = "7: Prescaler: GCLK_TC/1024"]
186    Div1024 = 7,
187}
188impl From<Prescalerselect> for u8 {
189    #[inline(always)]
190    fn from(variant: Prescalerselect) -> Self {
191        variant as _
192    }
193}
194impl crate::FieldSpec for Prescalerselect {
195    type Ux = u8;
196}
197impl crate::IsEnum for Prescalerselect {}
198#[doc = "Field `PRESCALER` reader - Prescaler"]
199pub type PrescalerR = crate::FieldReader<Prescalerselect>;
200impl PrescalerR {
201    #[doc = "Get enumerated values variant"]
202    #[inline(always)]
203    pub const fn variant(&self) -> Prescalerselect {
204        match self.bits {
205            0 => Prescalerselect::Div1,
206            1 => Prescalerselect::Div2,
207            2 => Prescalerselect::Div4,
208            3 => Prescalerselect::Div8,
209            4 => Prescalerselect::Div16,
210            5 => Prescalerselect::Div64,
211            6 => Prescalerselect::Div256,
212            7 => Prescalerselect::Div1024,
213            _ => unreachable!(),
214        }
215    }
216    #[doc = "Prescaler: GCLK_TC"]
217    #[inline(always)]
218    pub fn is_div1(&self) -> bool {
219        *self == Prescalerselect::Div1
220    }
221    #[doc = "Prescaler: GCLK_TC/2"]
222    #[inline(always)]
223    pub fn is_div2(&self) -> bool {
224        *self == Prescalerselect::Div2
225    }
226    #[doc = "Prescaler: GCLK_TC/4"]
227    #[inline(always)]
228    pub fn is_div4(&self) -> bool {
229        *self == Prescalerselect::Div4
230    }
231    #[doc = "Prescaler: GCLK_TC/8"]
232    #[inline(always)]
233    pub fn is_div8(&self) -> bool {
234        *self == Prescalerselect::Div8
235    }
236    #[doc = "Prescaler: GCLK_TC/16"]
237    #[inline(always)]
238    pub fn is_div16(&self) -> bool {
239        *self == Prescalerselect::Div16
240    }
241    #[doc = "Prescaler: GCLK_TC/64"]
242    #[inline(always)]
243    pub fn is_div64(&self) -> bool {
244        *self == Prescalerselect::Div64
245    }
246    #[doc = "Prescaler: GCLK_TC/256"]
247    #[inline(always)]
248    pub fn is_div256(&self) -> bool {
249        *self == Prescalerselect::Div256
250    }
251    #[doc = "Prescaler: GCLK_TC/1024"]
252    #[inline(always)]
253    pub fn is_div1024(&self) -> bool {
254        *self == Prescalerselect::Div1024
255    }
256}
257#[doc = "Field `PRESCALER` writer - Prescaler"]
258pub type PrescalerW<'a, REG> = crate::FieldWriter<'a, REG, 3, Prescalerselect, crate::Safe>;
259impl<'a, REG> PrescalerW<'a, REG>
260where
261    REG: crate::Writable + crate::RegisterSpec,
262    REG::Ux: From<u8>,
263{
264    #[doc = "Prescaler: GCLK_TC"]
265    #[inline(always)]
266    pub fn div1(self) -> &'a mut crate::W<REG> {
267        self.variant(Prescalerselect::Div1)
268    }
269    #[doc = "Prescaler: GCLK_TC/2"]
270    #[inline(always)]
271    pub fn div2(self) -> &'a mut crate::W<REG> {
272        self.variant(Prescalerselect::Div2)
273    }
274    #[doc = "Prescaler: GCLK_TC/4"]
275    #[inline(always)]
276    pub fn div4(self) -> &'a mut crate::W<REG> {
277        self.variant(Prescalerselect::Div4)
278    }
279    #[doc = "Prescaler: GCLK_TC/8"]
280    #[inline(always)]
281    pub fn div8(self) -> &'a mut crate::W<REG> {
282        self.variant(Prescalerselect::Div8)
283    }
284    #[doc = "Prescaler: GCLK_TC/16"]
285    #[inline(always)]
286    pub fn div16(self) -> &'a mut crate::W<REG> {
287        self.variant(Prescalerselect::Div16)
288    }
289    #[doc = "Prescaler: GCLK_TC/64"]
290    #[inline(always)]
291    pub fn div64(self) -> &'a mut crate::W<REG> {
292        self.variant(Prescalerselect::Div64)
293    }
294    #[doc = "Prescaler: GCLK_TC/256"]
295    #[inline(always)]
296    pub fn div256(self) -> &'a mut crate::W<REG> {
297        self.variant(Prescalerselect::Div256)
298    }
299    #[doc = "Prescaler: GCLK_TC/1024"]
300    #[inline(always)]
301    pub fn div1024(self) -> &'a mut crate::W<REG> {
302        self.variant(Prescalerselect::Div1024)
303    }
304}
305#[doc = "Field `ALOCK` reader - Auto Lock"]
306pub type AlockR = crate::BitReader;
307#[doc = "Field `ALOCK` writer - Auto Lock"]
308pub type AlockW<'a, REG> = crate::BitWriter<'a, REG>;
309#[doc = "Field `DMAOS` reader - DMA One-Shot Trigger Mode"]
310pub type DmaosR = crate::BitReader;
311#[doc = "Field `DMAOS` writer - DMA One-Shot Trigger Mode"]
312pub type DmaosW<'a, REG> = crate::BitWriter<'a, REG>;
313#[doc = "Field `CAPTEN0` reader - Capture Channel 0 Enable"]
314pub type Capten0R = crate::BitReader;
315#[doc = "Field `CAPTEN0` writer - Capture Channel 0 Enable"]
316pub type Capten0W<'a, REG> = crate::BitWriter<'a, REG>;
317#[doc = "Field `CAPTEN1` reader - Capture Channel 1 Enable"]
318pub type Capten1R = crate::BitReader;
319#[doc = "Field `CAPTEN1` writer - Capture Channel 1 Enable"]
320pub type Capten1W<'a, REG> = crate::BitWriter<'a, REG>;
321#[doc = "Field `COPEN0` reader - Capture On Pin 0 Enable"]
322pub type Copen0R = crate::BitReader;
323#[doc = "Field `COPEN0` writer - Capture On Pin 0 Enable"]
324pub type Copen0W<'a, REG> = crate::BitWriter<'a, REG>;
325#[doc = "Field `COPEN1` reader - Capture On Pin 1 Enable"]
326pub type Copen1R = crate::BitReader;
327#[doc = "Field `COPEN1` writer - Capture On Pin 1 Enable"]
328pub type Copen1W<'a, REG> = crate::BitWriter<'a, REG>;
329#[doc = "Capture Mode Channel 0\n\nValue on reset: 0"]
330#[derive(Clone, Copy, Debug, PartialEq, Eq)]
331#[repr(u8)]
332pub enum Captmode0select {
333    #[doc = "0: Default capture"]
334    Default = 0,
335    #[doc = "1: Minimum capture"]
336    Captmin = 1,
337    #[doc = "2: Maximum capture"]
338    Captmax = 2,
339}
340impl From<Captmode0select> for u8 {
341    #[inline(always)]
342    fn from(variant: Captmode0select) -> Self {
343        variant as _
344    }
345}
346impl crate::FieldSpec for Captmode0select {
347    type Ux = u8;
348}
349impl crate::IsEnum for Captmode0select {}
350#[doc = "Field `CAPTMODE0` reader - Capture Mode Channel 0"]
351pub type Captmode0R = crate::FieldReader<Captmode0select>;
352impl Captmode0R {
353    #[doc = "Get enumerated values variant"]
354    #[inline(always)]
355    pub const fn variant(&self) -> Option<Captmode0select> {
356        match self.bits {
357            0 => Some(Captmode0select::Default),
358            1 => Some(Captmode0select::Captmin),
359            2 => Some(Captmode0select::Captmax),
360            _ => None,
361        }
362    }
363    #[doc = "Default capture"]
364    #[inline(always)]
365    pub fn is_default(&self) -> bool {
366        *self == Captmode0select::Default
367    }
368    #[doc = "Minimum capture"]
369    #[inline(always)]
370    pub fn is_captmin(&self) -> bool {
371        *self == Captmode0select::Captmin
372    }
373    #[doc = "Maximum capture"]
374    #[inline(always)]
375    pub fn is_captmax(&self) -> bool {
376        *self == Captmode0select::Captmax
377    }
378}
379#[doc = "Field `CAPTMODE0` writer - Capture Mode Channel 0"]
380pub type Captmode0W<'a, REG> = crate::FieldWriter<'a, REG, 2, Captmode0select>;
381impl<'a, REG> Captmode0W<'a, REG>
382where
383    REG: crate::Writable + crate::RegisterSpec,
384    REG::Ux: From<u8>,
385{
386    #[doc = "Default capture"]
387    #[inline(always)]
388    pub fn default(self) -> &'a mut crate::W<REG> {
389        self.variant(Captmode0select::Default)
390    }
391    #[doc = "Minimum capture"]
392    #[inline(always)]
393    pub fn captmin(self) -> &'a mut crate::W<REG> {
394        self.variant(Captmode0select::Captmin)
395    }
396    #[doc = "Maximum capture"]
397    #[inline(always)]
398    pub fn captmax(self) -> &'a mut crate::W<REG> {
399        self.variant(Captmode0select::Captmax)
400    }
401}
402#[doc = "Capture mode Channel 1\n\nValue on reset: 0"]
403#[derive(Clone, Copy, Debug, PartialEq, Eq)]
404#[repr(u8)]
405pub enum Captmode1select {
406    #[doc = "0: Default capture"]
407    Default = 0,
408    #[doc = "1: Minimum capture"]
409    Captmin = 1,
410    #[doc = "2: Maximum capture"]
411    Captmax = 2,
412}
413impl From<Captmode1select> for u8 {
414    #[inline(always)]
415    fn from(variant: Captmode1select) -> Self {
416        variant as _
417    }
418}
419impl crate::FieldSpec for Captmode1select {
420    type Ux = u8;
421}
422impl crate::IsEnum for Captmode1select {}
423#[doc = "Field `CAPTMODE1` reader - Capture mode Channel 1"]
424pub type Captmode1R = crate::FieldReader<Captmode1select>;
425impl Captmode1R {
426    #[doc = "Get enumerated values variant"]
427    #[inline(always)]
428    pub const fn variant(&self) -> Option<Captmode1select> {
429        match self.bits {
430            0 => Some(Captmode1select::Default),
431            1 => Some(Captmode1select::Captmin),
432            2 => Some(Captmode1select::Captmax),
433            _ => None,
434        }
435    }
436    #[doc = "Default capture"]
437    #[inline(always)]
438    pub fn is_default(&self) -> bool {
439        *self == Captmode1select::Default
440    }
441    #[doc = "Minimum capture"]
442    #[inline(always)]
443    pub fn is_captmin(&self) -> bool {
444        *self == Captmode1select::Captmin
445    }
446    #[doc = "Maximum capture"]
447    #[inline(always)]
448    pub fn is_captmax(&self) -> bool {
449        *self == Captmode1select::Captmax
450    }
451}
452#[doc = "Field `CAPTMODE1` writer - Capture mode Channel 1"]
453pub type Captmode1W<'a, REG> = crate::FieldWriter<'a, REG, 2, Captmode1select>;
454impl<'a, REG> Captmode1W<'a, REG>
455where
456    REG: crate::Writable + crate::RegisterSpec,
457    REG::Ux: From<u8>,
458{
459    #[doc = "Default capture"]
460    #[inline(always)]
461    pub fn default(self) -> &'a mut crate::W<REG> {
462        self.variant(Captmode1select::Default)
463    }
464    #[doc = "Minimum capture"]
465    #[inline(always)]
466    pub fn captmin(self) -> &'a mut crate::W<REG> {
467        self.variant(Captmode1select::Captmin)
468    }
469    #[doc = "Maximum capture"]
470    #[inline(always)]
471    pub fn captmax(self) -> &'a mut crate::W<REG> {
472        self.variant(Captmode1select::Captmax)
473    }
474}
475impl R {
476    #[doc = "Bit 0 - Software Reset"]
477    #[inline(always)]
478    pub fn swrst(&self) -> SwrstR {
479        SwrstR::new((self.bits & 1) != 0)
480    }
481    #[doc = "Bit 1 - Enable"]
482    #[inline(always)]
483    pub fn enable(&self) -> EnableR {
484        EnableR::new(((self.bits >> 1) & 1) != 0)
485    }
486    #[doc = "Bits 2:3 - Timer Counter Mode"]
487    #[inline(always)]
488    pub fn mode(&self) -> ModeR {
489        ModeR::new(((self.bits >> 2) & 3) as u8)
490    }
491    #[doc = "Bits 4:5 - Prescaler and Counter Synchronization"]
492    #[inline(always)]
493    pub fn prescsync(&self) -> PrescsyncR {
494        PrescsyncR::new(((self.bits >> 4) & 3) as u8)
495    }
496    #[doc = "Bit 6 - Run during Standby"]
497    #[inline(always)]
498    pub fn runstdby(&self) -> RunstdbyR {
499        RunstdbyR::new(((self.bits >> 6) & 1) != 0)
500    }
501    #[doc = "Bit 7 - Clock On Demand"]
502    #[inline(always)]
503    pub fn ondemand(&self) -> OndemandR {
504        OndemandR::new(((self.bits >> 7) & 1) != 0)
505    }
506    #[doc = "Bits 8:10 - Prescaler"]
507    #[inline(always)]
508    pub fn prescaler(&self) -> PrescalerR {
509        PrescalerR::new(((self.bits >> 8) & 7) as u8)
510    }
511    #[doc = "Bit 11 - Auto Lock"]
512    #[inline(always)]
513    pub fn alock(&self) -> AlockR {
514        AlockR::new(((self.bits >> 11) & 1) != 0)
515    }
516    #[doc = "Bit 15 - DMA One-Shot Trigger Mode"]
517    #[inline(always)]
518    pub fn dmaos(&self) -> DmaosR {
519        DmaosR::new(((self.bits >> 15) & 1) != 0)
520    }
521    #[doc = "Bit 16 - Capture Channel 0 Enable"]
522    #[inline(always)]
523    pub fn capten0(&self) -> Capten0R {
524        Capten0R::new(((self.bits >> 16) & 1) != 0)
525    }
526    #[doc = "Bit 17 - Capture Channel 1 Enable"]
527    #[inline(always)]
528    pub fn capten1(&self) -> Capten1R {
529        Capten1R::new(((self.bits >> 17) & 1) != 0)
530    }
531    #[doc = "Bit 20 - Capture On Pin 0 Enable"]
532    #[inline(always)]
533    pub fn copen0(&self) -> Copen0R {
534        Copen0R::new(((self.bits >> 20) & 1) != 0)
535    }
536    #[doc = "Bit 21 - Capture On Pin 1 Enable"]
537    #[inline(always)]
538    pub fn copen1(&self) -> Copen1R {
539        Copen1R::new(((self.bits >> 21) & 1) != 0)
540    }
541    #[doc = "Bits 24:25 - Capture Mode Channel 0"]
542    #[inline(always)]
543    pub fn captmode0(&self) -> Captmode0R {
544        Captmode0R::new(((self.bits >> 24) & 3) as u8)
545    }
546    #[doc = "Bits 27:28 - Capture mode Channel 1"]
547    #[inline(always)]
548    pub fn captmode1(&self) -> Captmode1R {
549        Captmode1R::new(((self.bits >> 27) & 3) as u8)
550    }
551}
552impl W {
553    #[doc = "Bit 0 - Software Reset"]
554    #[inline(always)]
555    #[must_use]
556    pub fn swrst(&mut self) -> SwrstW<CtrlaSpec> {
557        SwrstW::new(self, 0)
558    }
559    #[doc = "Bit 1 - Enable"]
560    #[inline(always)]
561    #[must_use]
562    pub fn enable(&mut self) -> EnableW<CtrlaSpec> {
563        EnableW::new(self, 1)
564    }
565    #[doc = "Bits 2:3 - Timer Counter Mode"]
566    #[inline(always)]
567    #[must_use]
568    pub fn mode(&mut self) -> ModeW<CtrlaSpec> {
569        ModeW::new(self, 2)
570    }
571    #[doc = "Bits 4:5 - Prescaler and Counter Synchronization"]
572    #[inline(always)]
573    #[must_use]
574    pub fn prescsync(&mut self) -> PrescsyncW<CtrlaSpec> {
575        PrescsyncW::new(self, 4)
576    }
577    #[doc = "Bit 6 - Run during Standby"]
578    #[inline(always)]
579    #[must_use]
580    pub fn runstdby(&mut self) -> RunstdbyW<CtrlaSpec> {
581        RunstdbyW::new(self, 6)
582    }
583    #[doc = "Bit 7 - Clock On Demand"]
584    #[inline(always)]
585    #[must_use]
586    pub fn ondemand(&mut self) -> OndemandW<CtrlaSpec> {
587        OndemandW::new(self, 7)
588    }
589    #[doc = "Bits 8:10 - Prescaler"]
590    #[inline(always)]
591    #[must_use]
592    pub fn prescaler(&mut self) -> PrescalerW<CtrlaSpec> {
593        PrescalerW::new(self, 8)
594    }
595    #[doc = "Bit 11 - Auto Lock"]
596    #[inline(always)]
597    #[must_use]
598    pub fn alock(&mut self) -> AlockW<CtrlaSpec> {
599        AlockW::new(self, 11)
600    }
601    #[doc = "Bit 15 - DMA One-Shot Trigger Mode"]
602    #[inline(always)]
603    #[must_use]
604    pub fn dmaos(&mut self) -> DmaosW<CtrlaSpec> {
605        DmaosW::new(self, 15)
606    }
607    #[doc = "Bit 16 - Capture Channel 0 Enable"]
608    #[inline(always)]
609    #[must_use]
610    pub fn capten0(&mut self) -> Capten0W<CtrlaSpec> {
611        Capten0W::new(self, 16)
612    }
613    #[doc = "Bit 17 - Capture Channel 1 Enable"]
614    #[inline(always)]
615    #[must_use]
616    pub fn capten1(&mut self) -> Capten1W<CtrlaSpec> {
617        Capten1W::new(self, 17)
618    }
619    #[doc = "Bit 20 - Capture On Pin 0 Enable"]
620    #[inline(always)]
621    #[must_use]
622    pub fn copen0(&mut self) -> Copen0W<CtrlaSpec> {
623        Copen0W::new(self, 20)
624    }
625    #[doc = "Bit 21 - Capture On Pin 1 Enable"]
626    #[inline(always)]
627    #[must_use]
628    pub fn copen1(&mut self) -> Copen1W<CtrlaSpec> {
629        Copen1W::new(self, 21)
630    }
631    #[doc = "Bits 24:25 - Capture Mode Channel 0"]
632    #[inline(always)]
633    #[must_use]
634    pub fn captmode0(&mut self) -> Captmode0W<CtrlaSpec> {
635        Captmode0W::new(self, 24)
636    }
637    #[doc = "Bits 27:28 - Capture mode Channel 1"]
638    #[inline(always)]
639    #[must_use]
640    pub fn captmode1(&mut self) -> Captmode1W<CtrlaSpec> {
641        Captmode1W::new(self, 27)
642    }
643}
644#[doc = "Control A\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrla::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrla::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
645pub struct CtrlaSpec;
646impl crate::RegisterSpec for CtrlaSpec {
647    type Ux = u32;
648}
649#[doc = "`read()` method returns [`ctrla::R`](R) reader structure"]
650impl crate::Readable for CtrlaSpec {}
651#[doc = "`write(|w| ..)` method takes [`ctrla::W`](W) writer structure"]
652impl crate::Writable for CtrlaSpec {
653    type Safety = crate::Unsafe;
654    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
655    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
656}
657#[doc = "`reset()` method sets CTRLA to value 0"]
658impl crate::Resettable for CtrlaSpec {
659    const RESET_VALUE: u32 = 0;
660}
atsamd51j/tc0/count8/ctrla.rs

atsamd51j/tc0/count8/
ctrla.rs
