atsamd21g/
port.rs

Help
1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4    dir: (),
5    _reserved1: [u8; 0x04],
6    dirclr: (),
7    _reserved2: [u8; 0x04],
8    dirset: (),
9    _reserved3: [u8; 0x04],
10    dirtgl: (),
11    _reserved4: [u8; 0x04],
12    out: (),
13    _reserved5: [u8; 0x04],
14    outclr: (),
15    _reserved6: [u8; 0x04],
16    outset: (),
17    _reserved7: [u8; 0x04],
18    outtgl: (),
19    _reserved8: [u8; 0x04],
20    in_: (),
21    _reserved9: [u8; 0x04],
22    ctrl: (),
23    _reserved10: [u8; 0x04],
24    wrconfig: (),
25    _reserved11: [u8; 0x08],
26    pmux0_: [Pmux0_; 16],
27    pincfg0_: [Pincfg0_; 32],
28    _reserved13: [u8; 0x50],
29    pmux1_0: [Pmux1_; 16],
30    pincfg1_0: [Pincfg1_; 32],
31}
32impl RegisterBlock {
33    #[doc = "0x00..0x08 - Data Direction"]
34    #[inline(always)]
35    pub const fn dir(&self, n: usize) -> &Dir {
36        #[allow(clippy::no_effect)]
37        [(); 2][n];
38        unsafe {
39            &*(self as *const Self)
40                .cast::<u8>()
41                .add(0)
42                .add(128 * n)
43                .cast()
44        }
45    }
46    #[doc = "Iterator for array of:"]
47    #[doc = "0x00..0x08 - Data Direction"]
48    #[inline(always)]
49    pub fn dir_iter(&self) -> impl Iterator<Item = &Dir> {
50        (0..2).map(move |n| unsafe {
51            &*(self as *const Self)
52                .cast::<u8>()
53                .add(0)
54                .add(128 * n)
55                .cast()
56        })
57    }
58    #[doc = "0x04..0x0c - Data Direction Clear"]
59    #[inline(always)]
60    pub const fn dirclr(&self, n: usize) -> &Dirclr {
61        #[allow(clippy::no_effect)]
62        [(); 2][n];
63        unsafe {
64            &*(self as *const Self)
65                .cast::<u8>()
66                .add(4)
67                .add(128 * n)
68                .cast()
69        }
70    }
71    #[doc = "Iterator for array of:"]
72    #[doc = "0x04..0x0c - Data Direction Clear"]
73    #[inline(always)]
74    pub fn dirclr_iter(&self) -> impl Iterator<Item = &Dirclr> {
75        (0..2).map(move |n| unsafe {
76            &*(self as *const Self)
77                .cast::<u8>()
78                .add(4)
79                .add(128 * n)
80                .cast()
81        })
82    }
83    #[doc = "0x08..0x10 - Data Direction Set"]
84    #[inline(always)]
85    pub const fn dirset(&self, n: usize) -> &Dirset {
86        #[allow(clippy::no_effect)]
87        [(); 2][n];
88        unsafe {
89            &*(self as *const Self)
90                .cast::<u8>()
91                .add(8)
92                .add(128 * n)
93                .cast()
94        }
95    }
96    #[doc = "Iterator for array of:"]
97    #[doc = "0x08..0x10 - Data Direction Set"]
98    #[inline(always)]
99    pub fn dirset_iter(&self) -> impl Iterator<Item = &Dirset> {
100        (0..2).map(move |n| unsafe {
101            &*(self as *const Self)
102                .cast::<u8>()
103                .add(8)
104                .add(128 * n)
105                .cast()
106        })
107    }
108    #[doc = "0x0c..0x14 - Data Direction Toggle"]
109    #[inline(always)]
110    pub const fn dirtgl(&self, n: usize) -> &Dirtgl {
111        #[allow(clippy::no_effect)]
112        [(); 2][n];
113        unsafe {
114            &*(self as *const Self)
115                .cast::<u8>()
116                .add(12)
117                .add(128 * n)
118                .cast()
119        }
120    }
121    #[doc = "Iterator for array of:"]
122    #[doc = "0x0c..0x14 - Data Direction Toggle"]
123    #[inline(always)]
124    pub fn dirtgl_iter(&self) -> impl Iterator<Item = &Dirtgl> {
125        (0..2).map(move |n| unsafe {
126            &*(self as *const Self)
127                .cast::<u8>()
128                .add(12)
129                .add(128 * n)
130                .cast()
131        })
132    }
133    #[doc = "0x10..0x18 - Data Output Value"]
134    #[inline(always)]
135    pub const fn out(&self, n: usize) -> &Out {
136        #[allow(clippy::no_effect)]
137        [(); 2][n];
138        unsafe {
139            &*(self as *const Self)
140                .cast::<u8>()
141                .add(16)
142                .add(128 * n)
143                .cast()
144        }
145    }
146    #[doc = "Iterator for array of:"]
147    #[doc = "0x10..0x18 - Data Output Value"]
148    #[inline(always)]
149    pub fn out_iter(&self) -> impl Iterator<Item = &Out> {
150        (0..2).map(move |n| unsafe {
151            &*(self as *const Self)
152                .cast::<u8>()
153                .add(16)
154                .add(128 * n)
155                .cast()
156        })
157    }
158    #[doc = "0x14..0x1c - Data Output Value Clear"]
159    #[inline(always)]
160    pub const fn outclr(&self, n: usize) -> &Outclr {
161        #[allow(clippy::no_effect)]
162        [(); 2][n];
163        unsafe {
164            &*(self as *const Self)
165                .cast::<u8>()
166                .add(20)
167                .add(128 * n)
168                .cast()
169        }
170    }
171    #[doc = "Iterator for array of:"]
172    #[doc = "0x14..0x1c - Data Output Value Clear"]
173    #[inline(always)]
174    pub fn outclr_iter(&self) -> impl Iterator<Item = &Outclr> {
175        (0..2).map(move |n| unsafe {
176            &*(self as *const Self)
177                .cast::<u8>()
178                .add(20)
179                .add(128 * n)
180                .cast()
181        })
182    }
183    #[doc = "0x18..0x20 - Data Output Value Set"]
184    #[inline(always)]
185    pub const fn outset(&self, n: usize) -> &Outset {
186        #[allow(clippy::no_effect)]
187        [(); 2][n];
188        unsafe {
189            &*(self as *const Self)
190                .cast::<u8>()
191                .add(24)
192                .add(128 * n)
193                .cast()
194        }
195    }
196    #[doc = "Iterator for array of:"]
197    #[doc = "0x18..0x20 - Data Output Value Set"]
198    #[inline(always)]
199    pub fn outset_iter(&self) -> impl Iterator<Item = &Outset> {
200        (0..2).map(move |n| unsafe {
201            &*(self as *const Self)
202                .cast::<u8>()
203                .add(24)
204                .add(128 * n)
205                .cast()
206        })
207    }
208    #[doc = "0x1c..0x24 - Data Output Value Toggle"]
209    #[inline(always)]
210    pub const fn outtgl(&self, n: usize) -> &Outtgl {
211        #[allow(clippy::no_effect)]
212        [(); 2][n];
213        unsafe {
214            &*(self as *const Self)
215                .cast::<u8>()
216                .add(28)
217                .add(128 * n)
218                .cast()
219        }
220    }
221    #[doc = "Iterator for array of:"]
222    #[doc = "0x1c..0x24 - Data Output Value Toggle"]
223    #[inline(always)]
224    pub fn outtgl_iter(&self) -> impl Iterator<Item = &Outtgl> {
225        (0..2).map(move |n| unsafe {
226            &*(self as *const Self)
227                .cast::<u8>()
228                .add(28)
229                .add(128 * n)
230                .cast()
231        })
232    }
233    #[doc = "0x20..0x28 - Data Input Value"]
234    #[inline(always)]
235    pub const fn in_(&self, n: usize) -> &In {
236        #[allow(clippy::no_effect)]
237        [(); 2][n];
238        unsafe {
239            &*(self as *const Self)
240                .cast::<u8>()
241                .add(32)
242                .add(128 * n)
243                .cast()
244        }
245    }
246    #[doc = "Iterator for array of:"]
247    #[doc = "0x20..0x28 - Data Input Value"]
248    #[inline(always)]
249    pub fn in__iter(&self) -> impl Iterator<Item = &In> {
250        (0..2).map(move |n| unsafe {
251            &*(self as *const Self)
252                .cast::<u8>()
253                .add(32)
254                .add(128 * n)
255                .cast()
256        })
257    }
258    #[doc = "0x24..0x2c - Control"]
259    #[inline(always)]
260    pub const fn ctrl(&self, n: usize) -> &Ctrl {
261        #[allow(clippy::no_effect)]
262        [(); 2][n];
263        unsafe {
264            &*(self as *const Self)
265                .cast::<u8>()
266                .add(36)
267                .add(128 * n)
268                .cast()
269        }
270    }
271    #[doc = "Iterator for array of:"]
272    #[doc = "0x24..0x2c - Control"]
273    #[inline(always)]
274    pub fn ctrl_iter(&self) -> impl Iterator<Item = &Ctrl> {
275        (0..2).map(move |n| unsafe {
276            &*(self as *const Self)
277                .cast::<u8>()
278                .add(36)
279                .add(128 * n)
280                .cast()
281        })
282    }
283    #[doc = "0x28..0x30 - Write Configuration"]
284    #[inline(always)]
285    pub const fn wrconfig(&self, n: usize) -> &Wrconfig {
286        #[allow(clippy::no_effect)]
287        [(); 2][n];
288        unsafe {
289            &*(self as *const Self)
290                .cast::<u8>()
291                .add(40)
292                .add(128 * n)
293                .cast()
294        }
295    }
296    #[doc = "Iterator for array of:"]
297    #[doc = "0x28..0x30 - Write Configuration"]
298    #[inline(always)]
299    pub fn wrconfig_iter(&self) -> impl Iterator<Item = &Wrconfig> {
300        (0..2).map(move |n| unsafe {
301            &*(self as *const Self)
302                .cast::<u8>()
303                .add(40)
304                .add(128 * n)
305                .cast()
306        })
307    }
308    #[doc = "0x30..0x40 - Peripheral Multiplexing n - Group 0"]
309    #[inline(always)]
310    pub const fn pmux0_(&self, n: usize) -> &Pmux0_ {
311        &self.pmux0_[n]
312    }
313    #[doc = "Iterator for array of:"]
314    #[doc = "0x30..0x40 - Peripheral Multiplexing n - Group 0"]
315    #[inline(always)]
316    pub fn pmux0__iter(&self) -> impl Iterator<Item = &Pmux0_> {
317        self.pmux0_.iter()
318    }
319    #[doc = "0x40..0x60 - Pin Configuration n - Group 0"]
320    #[inline(always)]
321    pub const fn pincfg0_(&self, n: usize) -> &Pincfg0_ {
322        &self.pincfg0_[n]
323    }
324    #[doc = "Iterator for array of:"]
325    #[doc = "0x40..0x60 - Pin Configuration n - Group 0"]
326    #[inline(always)]
327    pub fn pincfg0__iter(&self) -> impl Iterator<Item = &Pincfg0_> {
328        self.pincfg0_.iter()
329    }
330    #[doc = "0xb0..0xc0 - Peripheral Multiplexing n - Group 1"]
331    #[inline(always)]
332    pub const fn pmux1_0(&self, n: usize) -> &Pmux1_ {
333        &self.pmux1_0[n]
334    }
335    #[doc = "Iterator for array of:"]
336    #[doc = "0xb0..0xc0 - Peripheral Multiplexing n - Group 1"]
337    #[inline(always)]
338    pub fn pmux1_0_iter(&self) -> impl Iterator<Item = &Pmux1_> {
339        self.pmux1_0.iter()
340    }
341    #[doc = "0xc0..0xe0 - Pin Configuration n - Group 1"]
342    #[inline(always)]
343    pub const fn pincfg1_0(&self, n: usize) -> &Pincfg1_ {
344        &self.pincfg1_0[n]
345    }
346    #[doc = "Iterator for array of:"]
347    #[doc = "0xc0..0xe0 - Pin Configuration n - Group 1"]
348    #[inline(always)]
349    pub fn pincfg1_0_iter(&self) -> impl Iterator<Item = &Pincfg1_> {
350        self.pincfg1_0.iter()
351    }
352}
353#[doc = "DIR (rw) register accessor: Data Direction\n\nYou can [`read`](crate::Reg::read) this register and get [`dir::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dir::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dir`]
354module"]
355#[doc(alias = "DIR")]
356pub type Dir = crate::Reg<dir::DirSpec>;
357#[doc = "Data Direction"]
358pub mod dir;
359#[doc = "DIRCLR (rw) register accessor: Data Direction Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`dirclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dirclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dirclr`]
360module"]
361#[doc(alias = "DIRCLR")]
362pub type Dirclr = crate::Reg<dirclr::DirclrSpec>;
363#[doc = "Data Direction Clear"]
364pub mod dirclr;
365#[doc = "DIRSET (rw) register accessor: Data Direction Set\n\nYou can [`read`](crate::Reg::read) this register and get [`dirset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dirset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dirset`]
366module"]
367#[doc(alias = "DIRSET")]
368pub type Dirset = crate::Reg<dirset::DirsetSpec>;
369#[doc = "Data Direction Set"]
370pub mod dirset;
371#[doc = "DIRTGL (rw) register accessor: Data Direction Toggle\n\nYou can [`read`](crate::Reg::read) this register and get [`dirtgl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dirtgl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dirtgl`]
372module"]
373#[doc(alias = "DIRTGL")]
374pub type Dirtgl = crate::Reg<dirtgl::DirtglSpec>;
375#[doc = "Data Direction Toggle"]
376pub mod dirtgl;
377#[doc = "OUT (rw) register accessor: Data Output Value\n\nYou can [`read`](crate::Reg::read) this register and get [`out::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out`]
378module"]
379#[doc(alias = "OUT")]
380pub type Out = crate::Reg<out::OutSpec>;
381#[doc = "Data Output Value"]
382pub mod out;
383#[doc = "OUTCLR (rw) register accessor: Data Output Value Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`outclr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outclr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outclr`]
384module"]
385#[doc(alias = "OUTCLR")]
386pub type Outclr = crate::Reg<outclr::OutclrSpec>;
387#[doc = "Data Output Value Clear"]
388pub mod outclr;
389#[doc = "OUTSET (rw) register accessor: Data Output Value Set\n\nYou can [`read`](crate::Reg::read) this register and get [`outset::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outset::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outset`]
390module"]
391#[doc(alias = "OUTSET")]
392pub type Outset = crate::Reg<outset::OutsetSpec>;
393#[doc = "Data Output Value Set"]
394pub mod outset;
395#[doc = "OUTTGL (rw) register accessor: Data Output Value Toggle\n\nYou can [`read`](crate::Reg::read) this register and get [`outtgl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outtgl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@outtgl`]
396module"]
397#[doc(alias = "OUTTGL")]
398pub type Outtgl = crate::Reg<outtgl::OuttglSpec>;
399#[doc = "Data Output Value Toggle"]
400pub mod outtgl;
401#[doc = "IN (r) register accessor: Data Input Value\n\nYou can [`read`](crate::Reg::read) this register and get [`in_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_`]
402module"]
403#[doc(alias = "IN")]
404pub type In = crate::Reg<in_::InSpec>;
405#[doc = "Data Input Value"]
406pub mod in_;
407#[doc = "CTRL (rw) register accessor: Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
408module"]
409#[doc(alias = "CTRL")]
410pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
411#[doc = "Control"]
412pub mod ctrl;
413#[doc = "WRCONFIG (w) register accessor: Write Configuration\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wrconfig::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wrconfig`]
414module"]
415#[doc(alias = "WRCONFIG")]
416pub type Wrconfig = crate::Reg<wrconfig::WrconfigSpec>;
417#[doc = "Write Configuration"]
418pub mod wrconfig;
419#[doc = "PMUX0_ (rw) register accessor: Peripheral Multiplexing n - Group 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pmux0_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pmux0_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pmux0_`]
420module"]
421#[doc(alias = "PMUX0_")]
422pub type Pmux0_ = crate::Reg<pmux0_::Pmux0_Spec>;
423#[doc = "Peripheral Multiplexing n - Group 0"]
424pub mod pmux0_;
425pub use pmux0_ as pmux1_;
426pub use Pmux0_ as Pmux1_;
427#[doc = "PINCFG0_ (rw) register accessor: Pin Configuration n - Group 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pincfg0_::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pincfg0_::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pincfg0_`]
428module"]
429#[doc(alias = "PINCFG0_")]
430pub type Pincfg0_ = crate::Reg<pincfg0_::Pincfg0_Spec>;
431#[doc = "Pin Configuration n - Group 0"]
432pub mod pincfg0_;
433pub use pincfg0_ as pincfg1_;
434pub use Pincfg0_ as Pincfg1_;
atsamd21g/port.rs

atsamd21g/
port.rs
