1#[repr(C)]
2#[doc = "Register block"]
3pub struct RegisterBlock {
4 ctrl: Ctrl,
5 statusa: Statusa,
6 statusb: Statusb,
7 _reserved3: [u8; 0x01],
8 addr: Addr,
9 length: Length,
10 data: Data,
11 dcc: [Dcc; 2],
12 did: Did,
13 _reserved8: [u8; 0x0fe4],
14 entry: Entry,
15 entry1: Entry1,
16 end: End,
17 _reserved11: [u8; 0x0fc0],
18 memtype: Memtype,
19 pid4: Pid4,
20 _reserved13: [u8; 0x0c],
21 pid0: Pid0,
22 pid1: Pid1,
23 pid2: Pid2,
24 pid3: Pid3,
25 cid0: Cid0,
26 cid1: Cid1,
27 cid2: Cid2,
28 cid3: Cid3,
29}
30impl RegisterBlock {
31 #[doc = "0x00 - Control"]
32 #[inline(always)]
33 pub const fn ctrl(&self) -> &Ctrl {
34 &self.ctrl
35 }
36 #[doc = "0x01 - Status A"]
37 #[inline(always)]
38 pub const fn statusa(&self) -> &Statusa {
39 &self.statusa
40 }
41 #[doc = "0x02 - Status B"]
42 #[inline(always)]
43 pub const fn statusb(&self) -> &Statusb {
44 &self.statusb
45 }
46 #[doc = "0x04 - Address"]
47 #[inline(always)]
48 pub const fn addr(&self) -> &Addr {
49 &self.addr
50 }
51 #[doc = "0x08 - Length"]
52 #[inline(always)]
53 pub const fn length(&self) -> &Length {
54 &self.length
55 }
56 #[doc = "0x0c - Data"]
57 #[inline(always)]
58 pub const fn data(&self) -> &Data {
59 &self.data
60 }
61 #[doc = "0x10..0x18 - Debug Communication Channel n"]
62 #[inline(always)]
63 pub const fn dcc(&self, n: usize) -> &Dcc {
64 &self.dcc[n]
65 }
66 #[doc = "Iterator for array of:"]
67 #[doc = "0x10..0x18 - Debug Communication Channel n"]
68 #[inline(always)]
69 pub fn dcc_iter(&self) -> impl Iterator<Item = &Dcc> {
70 self.dcc.iter()
71 }
72 #[doc = "0x18 - Device Identification"]
73 #[inline(always)]
74 pub const fn did(&self) -> &Did {
75 &self.did
76 }
77 #[doc = "0x1000 - CoreSight ROM Table Entry 0"]
78 #[inline(always)]
79 pub const fn entry(&self) -> &Entry {
80 &self.entry
81 }
82 #[doc = "0x1004 - CoreSight ROM Table Entry 1"]
83 #[inline(always)]
84 pub const fn entry1(&self) -> &Entry1 {
85 &self.entry1
86 }
87 #[doc = "0x1008 - CoreSight ROM Table End"]
88 #[inline(always)]
89 pub const fn end(&self) -> &End {
90 &self.end
91 }
92 #[doc = "0x1fcc - CoreSight ROM Table Memory Type"]
93 #[inline(always)]
94 pub const fn memtype(&self) -> &Memtype {
95 &self.memtype
96 }
97 #[doc = "0x1fd0 - Peripheral Identification 4"]
98 #[inline(always)]
99 pub const fn pid4(&self) -> &Pid4 {
100 &self.pid4
101 }
102 #[doc = "0x1fe0 - Peripheral Identification 0"]
103 #[inline(always)]
104 pub const fn pid0(&self) -> &Pid0 {
105 &self.pid0
106 }
107 #[doc = "0x1fe4 - Peripheral Identification 1"]
108 #[inline(always)]
109 pub const fn pid1(&self) -> &Pid1 {
110 &self.pid1
111 }
112 #[doc = "0x1fe8 - Peripheral Identification 2"]
113 #[inline(always)]
114 pub const fn pid2(&self) -> &Pid2 {
115 &self.pid2
116 }
117 #[doc = "0x1fec - Peripheral Identification 3"]
118 #[inline(always)]
119 pub const fn pid3(&self) -> &Pid3 {
120 &self.pid3
121 }
122 #[doc = "0x1ff0 - Component Identification 0"]
123 #[inline(always)]
124 pub const fn cid0(&self) -> &Cid0 {
125 &self.cid0
126 }
127 #[doc = "0x1ff4 - Component Identification 1"]
128 #[inline(always)]
129 pub const fn cid1(&self) -> &Cid1 {
130 &self.cid1
131 }
132 #[doc = "0x1ff8 - Component Identification 2"]
133 #[inline(always)]
134 pub const fn cid2(&self) -> &Cid2 {
135 &self.cid2
136 }
137 #[doc = "0x1ffc - Component Identification 3"]
138 #[inline(always)]
139 pub const fn cid3(&self) -> &Cid3 {
140 &self.cid3
141 }
142}
143#[doc = "CTRL (w) register accessor: Control\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
144module"]
145#[doc(alias = "CTRL")]
146pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
147#[doc = "Control"]
148pub mod ctrl;
149#[doc = "STATUSA (rw) register accessor: Status A\n\nYou can [`read`](crate::Reg::read) this register and get [`statusa::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`statusa::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusa`]
150module"]
151#[doc(alias = "STATUSA")]
152pub type Statusa = crate::Reg<statusa::StatusaSpec>;
153#[doc = "Status A"]
154pub mod statusa;
155#[doc = "STATUSB (r) register accessor: Status B\n\nYou can [`read`](crate::Reg::read) this register and get [`statusb::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@statusb`]
156module"]
157#[doc(alias = "STATUSB")]
158pub type Statusb = crate::Reg<statusb::StatusbSpec>;
159#[doc = "Status B"]
160pub mod statusb;
161#[doc = "ADDR (rw) register accessor: Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`]
162module"]
163#[doc(alias = "ADDR")]
164pub type Addr = crate::Reg<addr::AddrSpec>;
165#[doc = "Address"]
166pub mod addr;
167#[doc = "LENGTH (rw) register accessor: Length\n\nYou can [`read`](crate::Reg::read) this register and get [`length::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`length::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@length`]
168module"]
169#[doc(alias = "LENGTH")]
170pub type Length = crate::Reg<length::LengthSpec>;
171#[doc = "Length"]
172pub mod length;
173#[doc = "DATA (rw) register accessor: Data\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`]
174module"]
175#[doc(alias = "DATA")]
176pub type Data = crate::Reg<data::DataSpec>;
177#[doc = "Data"]
178pub mod data;
179#[doc = "DCC (rw) register accessor: Debug Communication Channel n\n\nYou can [`read`](crate::Reg::read) this register and get [`dcc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcc`]
180module"]
181#[doc(alias = "DCC")]
182pub type Dcc = crate::Reg<dcc::DccSpec>;
183#[doc = "Debug Communication Channel n"]
184pub mod dcc;
185#[doc = "DID (r) register accessor: Device Identification\n\nYou can [`read`](crate::Reg::read) this register and get [`did::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@did`]
186module"]
187#[doc(alias = "DID")]
188pub type Did = crate::Reg<did::DidSpec>;
189#[doc = "Device Identification"]
190pub mod did;
191#[doc = "ENTRY (r) register accessor: CoreSight ROM Table Entry 0\n\nYou can [`read`](crate::Reg::read) this register and get [`entry::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry`]
192module"]
193#[doc(alias = "ENTRY")]
194pub type Entry = crate::Reg<entry::EntrySpec>;
195#[doc = "CoreSight ROM Table Entry 0"]
196pub mod entry;
197#[doc = "ENTRY1 (r) register accessor: CoreSight ROM Table Entry 1\n\nYou can [`read`](crate::Reg::read) this register and get [`entry1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@entry1`]
198module"]
199#[doc(alias = "ENTRY1")]
200pub type Entry1 = crate::Reg<entry1::Entry1Spec>;
201#[doc = "CoreSight ROM Table Entry 1"]
202pub mod entry1;
203#[doc = "END (r) register accessor: CoreSight ROM Table End\n\nYou can [`read`](crate::Reg::read) this register and get [`end::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@end`]
204module"]
205#[doc(alias = "END")]
206pub type End = crate::Reg<end::EndSpec>;
207#[doc = "CoreSight ROM Table End"]
208pub mod end;
209#[doc = "MEMTYPE (r) register accessor: CoreSight ROM Table Memory Type\n\nYou can [`read`](crate::Reg::read) this register and get [`memtype::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@memtype`]
210module"]
211#[doc(alias = "MEMTYPE")]
212pub type Memtype = crate::Reg<memtype::MemtypeSpec>;
213#[doc = "CoreSight ROM Table Memory Type"]
214pub mod memtype;
215#[doc = "PID4 (r) register accessor: Peripheral Identification 4\n\nYou can [`read`](crate::Reg::read) this register and get [`pid4::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid4`]
216module"]
217#[doc(alias = "PID4")]
218pub type Pid4 = crate::Reg<pid4::Pid4Spec>;
219#[doc = "Peripheral Identification 4"]
220pub mod pid4;
221#[doc = "PID0 (r) register accessor: Peripheral Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`pid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid0`]
222module"]
223#[doc(alias = "PID0")]
224pub type Pid0 = crate::Reg<pid0::Pid0Spec>;
225#[doc = "Peripheral Identification 0"]
226pub mod pid0;
227#[doc = "PID1 (r) register accessor: Peripheral Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`pid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid1`]
228module"]
229#[doc(alias = "PID1")]
230pub type Pid1 = crate::Reg<pid1::Pid1Spec>;
231#[doc = "Peripheral Identification 1"]
232pub mod pid1;
233#[doc = "PID2 (r) register accessor: Peripheral Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`pid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid2`]
234module"]
235#[doc(alias = "PID2")]
236pub type Pid2 = crate::Reg<pid2::Pid2Spec>;
237#[doc = "Peripheral Identification 2"]
238pub mod pid2;
239#[doc = "PID3 (r) register accessor: Peripheral Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`pid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pid3`]
240module"]
241#[doc(alias = "PID3")]
242pub type Pid3 = crate::Reg<pid3::Pid3Spec>;
243#[doc = "Peripheral Identification 3"]
244pub mod pid3;
245#[doc = "CID0 (r) register accessor: Component Identification 0\n\nYou can [`read`](crate::Reg::read) this register and get [`cid0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid0`]
246module"]
247#[doc(alias = "CID0")]
248pub type Cid0 = crate::Reg<cid0::Cid0Spec>;
249#[doc = "Component Identification 0"]
250pub mod cid0;
251#[doc = "CID1 (r) register accessor: Component Identification 1\n\nYou can [`read`](crate::Reg::read) this register and get [`cid1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid1`]
252module"]
253#[doc(alias = "CID1")]
254pub type Cid1 = crate::Reg<cid1::Cid1Spec>;
255#[doc = "Component Identification 1"]
256pub mod cid1;
257#[doc = "CID2 (r) register accessor: Component Identification 2\n\nYou can [`read`](crate::Reg::read) this register and get [`cid2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid2`]
258module"]
259#[doc(alias = "CID2")]
260pub type Cid2 = crate::Reg<cid2::Cid2Spec>;
261#[doc = "Component Identification 2"]
262pub mod cid2;
263#[doc = "CID3 (r) register accessor: Component Identification 3\n\nYou can [`read`](crate::Reg::read) this register and get [`cid3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cid3`]
264module"]
265#[doc(alias = "CID3")]
266pub type Cid3 = crate::Reg<cid3::Cid3Spec>;
267#[doc = "Component Identification 3"]
268pub mod cid3;