atsamd21g/usb/host/
pstatusclr.rs

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1#[doc = "Register `PSTATUSCLR%s` reader"]
2pub type R = crate::R<PstatusclrSpec>;
3#[doc = "Register `PSTATUSCLR%s` writer"]
4pub type W = crate::W<PstatusclrSpec>;
5#[doc = "Field `DTGL` reader - Data Toggle clear"]
6pub type DtglR = crate::BitReader;
7#[doc = "Field `DTGL` writer - Data Toggle clear"]
8pub type DtglW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CURBK` reader - Curren Bank clear"]
10pub type CurbkR = crate::BitReader;
11#[doc = "Field `CURBK` writer - Curren Bank clear"]
12pub type CurbkW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PFREEZE` reader - Pipe Freeze Clear"]
14pub type PfreezeR = crate::BitReader;
15#[doc = "Field `PFREEZE` writer - Pipe Freeze Clear"]
16pub type PfreezeW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `BK0RDY` reader - Bank 0 Ready Clear"]
18pub type Bk0rdyR = crate::BitReader;
19#[doc = "Field `BK0RDY` writer - Bank 0 Ready Clear"]
20pub type Bk0rdyW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BK1RDY` reader - Bank 1 Ready Clear"]
22pub type Bk1rdyR = crate::BitReader;
23#[doc = "Field `BK1RDY` writer - Bank 1 Ready Clear"]
24pub type Bk1rdyW<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    #[doc = "Bit 0 - Data Toggle clear"]
27    #[inline(always)]
28    pub fn dtgl(&self) -> DtglR {
29        DtglR::new((self.bits & 1) != 0)
30    }
31    #[doc = "Bit 2 - Curren Bank clear"]
32    #[inline(always)]
33    pub fn curbk(&self) -> CurbkR {
34        CurbkR::new(((self.bits >> 2) & 1) != 0)
35    }
36    #[doc = "Bit 4 - Pipe Freeze Clear"]
37    #[inline(always)]
38    pub fn pfreeze(&self) -> PfreezeR {
39        PfreezeR::new(((self.bits >> 4) & 1) != 0)
40    }
41    #[doc = "Bit 6 - Bank 0 Ready Clear"]
42    #[inline(always)]
43    pub fn bk0rdy(&self) -> Bk0rdyR {
44        Bk0rdyR::new(((self.bits >> 6) & 1) != 0)
45    }
46    #[doc = "Bit 7 - Bank 1 Ready Clear"]
47    #[inline(always)]
48    pub fn bk1rdy(&self) -> Bk1rdyR {
49        Bk1rdyR::new(((self.bits >> 7) & 1) != 0)
50    }
51}
52impl W {
53    #[doc = "Bit 0 - Data Toggle clear"]
54    #[inline(always)]
55    #[must_use]
56    pub fn dtgl(&mut self) -> DtglW<PstatusclrSpec> {
57        DtglW::new(self, 0)
58    }
59    #[doc = "Bit 2 - Curren Bank clear"]
60    #[inline(always)]
61    #[must_use]
62    pub fn curbk(&mut self) -> CurbkW<PstatusclrSpec> {
63        CurbkW::new(self, 2)
64    }
65    #[doc = "Bit 4 - Pipe Freeze Clear"]
66    #[inline(always)]
67    #[must_use]
68    pub fn pfreeze(&mut self) -> PfreezeW<PstatusclrSpec> {
69        PfreezeW::new(self, 4)
70    }
71    #[doc = "Bit 6 - Bank 0 Ready Clear"]
72    #[inline(always)]
73    #[must_use]
74    pub fn bk0rdy(&mut self) -> Bk0rdyW<PstatusclrSpec> {
75        Bk0rdyW::new(self, 6)
76    }
77    #[doc = "Bit 7 - Bank 1 Ready Clear"]
78    #[inline(always)]
79    #[must_use]
80    pub fn bk1rdy(&mut self) -> Bk1rdyW<PstatusclrSpec> {
81        Bk1rdyW::new(self, 7)
82    }
83}
84#[doc = "HOST End Point Pipe Status Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`pstatusclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pstatusclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct PstatusclrSpec;
86impl crate::RegisterSpec for PstatusclrSpec {
87    type Ux = u8;
88}
89#[doc = "`read()` method returns [`pstatusclr::R`](R) reader structure"]
90impl crate::Readable for PstatusclrSpec {}
91#[doc = "`write(|w| ..)` method takes [`pstatusclr::W`](W) writer structure"]
92impl crate::Writable for PstatusclrSpec {
93    type Safety = crate::Unsafe;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
96}
97#[doc = "`reset()` method sets PSTATUSCLR%s to value 0"]
98impl crate::Resettable for PstatusclrSpec {
99    const RESET_VALUE: u8 = 0;
100}
atsamd21g/usb/host/pstatusclr.rs

atsamd21g/usb/host/
pstatusclr.rs
