atsamd21g/sercom0/i2cm/
addr.rs

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1#[doc = "Register `ADDR` reader"]
2pub type R = crate::R<AddrSpec>;
3#[doc = "Register `ADDR` writer"]
4pub type W = crate::W<AddrSpec>;
5#[doc = "Field `ADDR` reader - Address Value"]
6pub type AddrR = crate::FieldReader<u16>;
7#[doc = "Field `ADDR` writer - Address Value"]
8pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
9#[doc = "Field `LENEN` reader - Length Enable"]
10pub type LenenR = crate::BitReader;
11#[doc = "Field `LENEN` writer - Length Enable"]
12pub type LenenW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HS` reader - High Speed Mode"]
14pub type HsR = crate::BitReader;
15#[doc = "Field `HS` writer - High Speed Mode"]
16pub type HsW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TENBITEN` reader - Ten Bit Addressing Enable"]
18pub type TenbitenR = crate::BitReader;
19#[doc = "Field `TENBITEN` writer - Ten Bit Addressing Enable"]
20pub type TenbitenW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `LEN` reader - Length"]
22pub type LenR = crate::FieldReader;
23#[doc = "Field `LEN` writer - Length"]
24pub type LenW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
25impl R {
26    #[doc = "Bits 0:10 - Address Value"]
27    #[inline(always)]
28    pub fn addr(&self) -> AddrR {
29        AddrR::new((self.bits & 0x07ff) as u16)
30    }
31    #[doc = "Bit 13 - Length Enable"]
32    #[inline(always)]
33    pub fn lenen(&self) -> LenenR {
34        LenenR::new(((self.bits >> 13) & 1) != 0)
35    }
36    #[doc = "Bit 14 - High Speed Mode"]
37    #[inline(always)]
38    pub fn hs(&self) -> HsR {
39        HsR::new(((self.bits >> 14) & 1) != 0)
40    }
41    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
42    #[inline(always)]
43    pub fn tenbiten(&self) -> TenbitenR {
44        TenbitenR::new(((self.bits >> 15) & 1) != 0)
45    }
46    #[doc = "Bits 16:23 - Length"]
47    #[inline(always)]
48    pub fn len(&self) -> LenR {
49        LenR::new(((self.bits >> 16) & 0xff) as u8)
50    }
51}
52impl W {
53    #[doc = "Bits 0:10 - Address Value"]
54    #[inline(always)]
55    #[must_use]
56    pub fn addr(&mut self) -> AddrW<AddrSpec> {
57        AddrW::new(self, 0)
58    }
59    #[doc = "Bit 13 - Length Enable"]
60    #[inline(always)]
61    #[must_use]
62    pub fn lenen(&mut self) -> LenenW<AddrSpec> {
63        LenenW::new(self, 13)
64    }
65    #[doc = "Bit 14 - High Speed Mode"]
66    #[inline(always)]
67    #[must_use]
68    pub fn hs(&mut self) -> HsW<AddrSpec> {
69        HsW::new(self, 14)
70    }
71    #[doc = "Bit 15 - Ten Bit Addressing Enable"]
72    #[inline(always)]
73    #[must_use]
74    pub fn tenbiten(&mut self) -> TenbitenW<AddrSpec> {
75        TenbitenW::new(self, 15)
76    }
77    #[doc = "Bits 16:23 - Length"]
78    #[inline(always)]
79    #[must_use]
80    pub fn len(&mut self) -> LenW<AddrSpec> {
81        LenW::new(self, 16)
82    }
83}
84#[doc = "I2CM Address\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct AddrSpec;
86impl crate::RegisterSpec for AddrSpec {
87    type Ux = u32;
88}
89#[doc = "`read()` method returns [`addr::R`](R) reader structure"]
90impl crate::Readable for AddrSpec {}
91#[doc = "`write(|w| ..)` method takes [`addr::W`](W) writer structure"]
92impl crate::Writable for AddrSpec {
93    type Safety = crate::Unsafe;
94    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
95    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
96}
97#[doc = "`reset()` method sets ADDR to value 0"]
98impl crate::Resettable for AddrSpec {
99    const RESET_VALUE: u32 = 0;
100}
atsamd21g/sercom0/i2cm/addr.rs

atsamd21g/sercom0/i2cm/
addr.rs
