atsamd21g/sysctrl/
vreg.rs

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1#[doc = "Register `VREG` reader"]
2pub type R = crate::R<VregSpec>;
3#[doc = "Register `VREG` writer"]
4pub type W = crate::W<VregSpec>;
5#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
6pub type RunstdbyR = crate::BitReader;
7#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
8pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `FORCELDO` reader - Force LDO Voltage Regulator"]
10pub type ForceldoR = crate::BitReader;
11#[doc = "Field `FORCELDO` writer - Force LDO Voltage Regulator"]
12pub type ForceldoW<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 6 - Run in Standby"]
15    #[inline(always)]
16    pub fn runstdby(&self) -> RunstdbyR {
17        RunstdbyR::new(((self.bits >> 6) & 1) != 0)
18    }
19    #[doc = "Bit 13 - Force LDO Voltage Regulator"]
20    #[inline(always)]
21    pub fn forceldo(&self) -> ForceldoR {
22        ForceldoR::new(((self.bits >> 13) & 1) != 0)
23    }
24}
25impl W {
26    #[doc = "Bit 6 - Run in Standby"]
27    #[inline(always)]
28    #[must_use]
29    pub fn runstdby(&mut self) -> RunstdbyW<VregSpec> {
30        RunstdbyW::new(self, 6)
31    }
32    #[doc = "Bit 13 - Force LDO Voltage Regulator"]
33    #[inline(always)]
34    #[must_use]
35    pub fn forceldo(&mut self) -> ForceldoW<VregSpec> {
36        ForceldoW::new(self, 13)
37    }
38}
39#[doc = "Voltage Regulator System (VREG) Control\n\nYou can [`read`](crate::Reg::read) this register and get [`vreg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`vreg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
40pub struct VregSpec;
41impl crate::RegisterSpec for VregSpec {
42    type Ux = u16;
43}
44#[doc = "`read()` method returns [`vreg::R`](R) reader structure"]
45impl crate::Readable for VregSpec {}
46#[doc = "`write(|w| ..)` method takes [`vreg::W`](W) writer structure"]
47impl crate::Writable for VregSpec {
48    type Safety = crate::Unsafe;
49    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
50    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
51}
52#[doc = "`reset()` method sets VREG to value 0"]
53impl crate::Resettable for VregSpec {
54    const RESET_VALUE: u16 = 0;
55}
atsamd21g/sysctrl/vreg.rs

atsamd21g/sysctrl/
vreg.rs
