atsamd21g/dmac/
chctrlb.rs

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1#[doc = "Register `CHCTRLB` reader"]
2pub type R = crate::R<ChctrlbSpec>;
3#[doc = "Register `CHCTRLB` writer"]
4pub type W = crate::W<ChctrlbSpec>;
5#[doc = "Event Input Action\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Evactselect {
9    #[doc = "0: No action"]
10    Noact = 0,
11    #[doc = "1: Transfer and periodic transfer trigger"]
12    Trig = 1,
13    #[doc = "2: Conditional transfer trigger"]
14    Ctrig = 2,
15    #[doc = "3: Conditional block transfer"]
16    Cblock = 3,
17    #[doc = "4: Channel suspend operation"]
18    Suspend = 4,
19    #[doc = "5: Channel resume operation"]
20    Resume = 5,
21    #[doc = "6: Skip next block suspend action"]
22    Sskip = 6,
23}
24impl From<Evactselect> for u8 {
25    #[inline(always)]
26    fn from(variant: Evactselect) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for Evactselect {
31    type Ux = u8;
32}
33impl crate::IsEnum for Evactselect {}
34#[doc = "Field `EVACT` reader - Event Input Action"]
35pub type EvactR = crate::FieldReader<Evactselect>;
36impl EvactR {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub const fn variant(&self) -> Option<Evactselect> {
40        match self.bits {
41            0 => Some(Evactselect::Noact),
42            1 => Some(Evactselect::Trig),
43            2 => Some(Evactselect::Ctrig),
44            3 => Some(Evactselect::Cblock),
45            4 => Some(Evactselect::Suspend),
46            5 => Some(Evactselect::Resume),
47            6 => Some(Evactselect::Sskip),
48            _ => None,
49        }
50    }
51    #[doc = "No action"]
52    #[inline(always)]
53    pub fn is_noact(&self) -> bool {
54        *self == Evactselect::Noact
55    }
56    #[doc = "Transfer and periodic transfer trigger"]
57    #[inline(always)]
58    pub fn is_trig(&self) -> bool {
59        *self == Evactselect::Trig
60    }
61    #[doc = "Conditional transfer trigger"]
62    #[inline(always)]
63    pub fn is_ctrig(&self) -> bool {
64        *self == Evactselect::Ctrig
65    }
66    #[doc = "Conditional block transfer"]
67    #[inline(always)]
68    pub fn is_cblock(&self) -> bool {
69        *self == Evactselect::Cblock
70    }
71    #[doc = "Channel suspend operation"]
72    #[inline(always)]
73    pub fn is_suspend(&self) -> bool {
74        *self == Evactselect::Suspend
75    }
76    #[doc = "Channel resume operation"]
77    #[inline(always)]
78    pub fn is_resume(&self) -> bool {
79        *self == Evactselect::Resume
80    }
81    #[doc = "Skip next block suspend action"]
82    #[inline(always)]
83    pub fn is_sskip(&self) -> bool {
84        *self == Evactselect::Sskip
85    }
86}
87#[doc = "Field `EVACT` writer - Event Input Action"]
88pub type EvactW<'a, REG> = crate::FieldWriter<'a, REG, 3, Evactselect>;
89impl<'a, REG> EvactW<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92    REG::Ux: From<u8>,
93{
94    #[doc = "No action"]
95    #[inline(always)]
96    pub fn noact(self) -> &'a mut crate::W<REG> {
97        self.variant(Evactselect::Noact)
98    }
99    #[doc = "Transfer and periodic transfer trigger"]
100    #[inline(always)]
101    pub fn trig(self) -> &'a mut crate::W<REG> {
102        self.variant(Evactselect::Trig)
103    }
104    #[doc = "Conditional transfer trigger"]
105    #[inline(always)]
106    pub fn ctrig(self) -> &'a mut crate::W<REG> {
107        self.variant(Evactselect::Ctrig)
108    }
109    #[doc = "Conditional block transfer"]
110    #[inline(always)]
111    pub fn cblock(self) -> &'a mut crate::W<REG> {
112        self.variant(Evactselect::Cblock)
113    }
114    #[doc = "Channel suspend operation"]
115    #[inline(always)]
116    pub fn suspend(self) -> &'a mut crate::W<REG> {
117        self.variant(Evactselect::Suspend)
118    }
119    #[doc = "Channel resume operation"]
120    #[inline(always)]
121    pub fn resume(self) -> &'a mut crate::W<REG> {
122        self.variant(Evactselect::Resume)
123    }
124    #[doc = "Skip next block suspend action"]
125    #[inline(always)]
126    pub fn sskip(self) -> &'a mut crate::W<REG> {
127        self.variant(Evactselect::Sskip)
128    }
129}
130#[doc = "Field `EVIE` reader - Channel Event Input Enable"]
131pub type EvieR = crate::BitReader;
132#[doc = "Field `EVIE` writer - Channel Event Input Enable"]
133pub type EvieW<'a, REG> = crate::BitWriter<'a, REG>;
134#[doc = "Field `EVOE` reader - Channel Event Output Enable"]
135pub type EvoeR = crate::BitReader;
136#[doc = "Field `EVOE` writer - Channel Event Output Enable"]
137pub type EvoeW<'a, REG> = crate::BitWriter<'a, REG>;
138#[doc = "Channel Arbitration Level\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq, Eq)]
140#[repr(u8)]
141pub enum Lvlselect {
142    #[doc = "0: Channel Priority Level 0"]
143    Lvl0 = 0,
144    #[doc = "1: Channel Priority Level 1"]
145    Lvl1 = 1,
146    #[doc = "2: Channel Priority Level 2"]
147    Lvl2 = 2,
148    #[doc = "3: Channel Priority Level 3"]
149    Lvl3 = 3,
150}
151impl From<Lvlselect> for u8 {
152    #[inline(always)]
153    fn from(variant: Lvlselect) -> Self {
154        variant as _
155    }
156}
157impl crate::FieldSpec for Lvlselect {
158    type Ux = u8;
159}
160impl crate::IsEnum for Lvlselect {}
161#[doc = "Field `LVL` reader - Channel Arbitration Level"]
162pub type LvlR = crate::FieldReader<Lvlselect>;
163impl LvlR {
164    #[doc = "Get enumerated values variant"]
165    #[inline(always)]
166    pub const fn variant(&self) -> Lvlselect {
167        match self.bits {
168            0 => Lvlselect::Lvl0,
169            1 => Lvlselect::Lvl1,
170            2 => Lvlselect::Lvl2,
171            3 => Lvlselect::Lvl3,
172            _ => unreachable!(),
173        }
174    }
175    #[doc = "Channel Priority Level 0"]
176    #[inline(always)]
177    pub fn is_lvl0(&self) -> bool {
178        *self == Lvlselect::Lvl0
179    }
180    #[doc = "Channel Priority Level 1"]
181    #[inline(always)]
182    pub fn is_lvl1(&self) -> bool {
183        *self == Lvlselect::Lvl1
184    }
185    #[doc = "Channel Priority Level 2"]
186    #[inline(always)]
187    pub fn is_lvl2(&self) -> bool {
188        *self == Lvlselect::Lvl2
189    }
190    #[doc = "Channel Priority Level 3"]
191    #[inline(always)]
192    pub fn is_lvl3(&self) -> bool {
193        *self == Lvlselect::Lvl3
194    }
195}
196#[doc = "Field `LVL` writer - Channel Arbitration Level"]
197pub type LvlW<'a, REG> = crate::FieldWriter<'a, REG, 2, Lvlselect, crate::Safe>;
198impl<'a, REG> LvlW<'a, REG>
199where
200    REG: crate::Writable + crate::RegisterSpec,
201    REG::Ux: From<u8>,
202{
203    #[doc = "Channel Priority Level 0"]
204    #[inline(always)]
205    pub fn lvl0(self) -> &'a mut crate::W<REG> {
206        self.variant(Lvlselect::Lvl0)
207    }
208    #[doc = "Channel Priority Level 1"]
209    #[inline(always)]
210    pub fn lvl1(self) -> &'a mut crate::W<REG> {
211        self.variant(Lvlselect::Lvl1)
212    }
213    #[doc = "Channel Priority Level 2"]
214    #[inline(always)]
215    pub fn lvl2(self) -> &'a mut crate::W<REG> {
216        self.variant(Lvlselect::Lvl2)
217    }
218    #[doc = "Channel Priority Level 3"]
219    #[inline(always)]
220    pub fn lvl3(self) -> &'a mut crate::W<REG> {
221        self.variant(Lvlselect::Lvl3)
222    }
223}
224#[doc = "Trigger Source\n\nValue on reset: 0"]
225#[derive(Clone, Copy, Debug, PartialEq, Eq)]
226#[repr(u8)]
227pub enum Trigsrcselect {
228    #[doc = "0: Only software/event triggers"]
229    Disable = 0,
230    #[doc = "1: SERCOM0 RX Trigger"]
231    Sercom0Rx = 1,
232    #[doc = "2: SERCOM0 TX Trigger"]
233    Sercom0Tx = 2,
234    #[doc = "3: SERCOM1 RX Trigger"]
235    Sercom1Rx = 3,
236    #[doc = "4: SERCOM1 TX Trigger"]
237    Sercom1Tx = 4,
238    #[doc = "5: SERCOM2 RX Trigger"]
239    Sercom2Rx = 5,
240    #[doc = "6: SERCOM2 TX Trigger"]
241    Sercom2Tx = 6,
242    #[doc = "7: SERCOM3 RX Trigger"]
243    Sercom3Rx = 7,
244    #[doc = "8: SERCOM3 TX Trigger"]
245    Sercom3Tx = 8,
246    #[doc = "9: SERCOM4 RX Trigger"]
247    Sercom4Rx = 9,
248    #[doc = "10: SERCOM4 TX Trigger"]
249    Sercom4Tx = 10,
250    #[doc = "11: SERCOM5 RX Trigger"]
251    Sercom5Rx = 11,
252    #[doc = "12: SERCOM5 TX Trigger"]
253    Sercom5Tx = 12,
254    #[doc = "13: TCC0 Overflow Trigger"]
255    Tcc0Ovf = 13,
256    #[doc = "14: TCC0 Match/Compare 0 Trigger"]
257    Tcc0Mc0 = 14,
258    #[doc = "15: TCC0 Match/Compare 1 Trigger"]
259    Tcc0Mc1 = 15,
260    #[doc = "16: TCC0 Match/Compare 2 Trigger"]
261    Tcc0Mc2 = 16,
262    #[doc = "17: TCC0 Match/Compare 3 Trigger"]
263    Tcc0Mc3 = 17,
264    #[doc = "18: TCC1 Overflow Trigger"]
265    Tcc1Ovf = 18,
266    #[doc = "19: TCC1 Match/Compare 0 Trigger"]
267    Tcc1Mc0 = 19,
268    #[doc = "20: TCC1 Match/Compare 1 Trigger"]
269    Tcc1Mc1 = 20,
270    #[doc = "21: TCC2 Overflow Trigger"]
271    Tcc2Ovf = 21,
272    #[doc = "22: TCC2 Match/Compare 0 Trigger"]
273    Tcc2Mc0 = 22,
274    #[doc = "23: TCC2 Match/Compare 1 Trigger"]
275    Tcc2Mc1 = 23,
276    #[doc = "24: TC3 Overflow Trigger"]
277    Tc3Ovf = 24,
278    #[doc = "25: TC3 Match/Compare 0 Trigger"]
279    Tc3Mc0 = 25,
280    #[doc = "26: TC3 Match/Compare 1 Trigger"]
281    Tc3Mc1 = 26,
282    #[doc = "27: TC4 Overflow Trigger"]
283    Tc4Ovf = 27,
284    #[doc = "28: TC4 Match/Compare 0 Trigger"]
285    Tc4Mc0 = 28,
286    #[doc = "29: TC4 Match/Compare 1 Trigger"]
287    Tc4Mc1 = 29,
288    #[doc = "30: TC5 Overflow Trigger"]
289    Tc5Ovf = 30,
290    #[doc = "31: TC5 Match/Compare 0 Trigger"]
291    Tc5Mc0 = 31,
292    #[doc = "32: TC5 Match/Compare 1 Trigger"]
293    Tc5Mc1 = 32,
294    #[doc = "33: TC6 Overflow Trigger"]
295    Tc6Ovf = 33,
296    #[doc = "34: TC6 Match/Compare 0 Trigger"]
297    Tc6Mc0 = 34,
298    #[doc = "35: TC6 Match/Compare 1 Trigger"]
299    Tc6Mc1 = 35,
300    #[doc = "36: TC7 Overflow Trigger"]
301    Tc7Ovf = 36,
302    #[doc = "37: TC7 Match/Compare 0 Trigger"]
303    Tc7Mc0 = 37,
304    #[doc = "38: TC7 Match/Compare 1 Trigger"]
305    Tc7Mc1 = 38,
306    #[doc = "39: ADC Result Ready Trigger"]
307    AdcResrdy = 39,
308    #[doc = "40: DAC Empty Trigger"]
309    DacEmpty = 40,
310    #[doc = "41: I2S RX 0 Trigger"]
311    I2sRx0 = 41,
312    #[doc = "42: I2S RX 1 Trigger"]
313    I2sRx1 = 42,
314    #[doc = "43: I2S TX 0 Trigger"]
315    I2sTx0 = 43,
316    #[doc = "44: I2S TX 1 Trigger"]
317    I2sTx1 = 44,
318    #[doc = "45: TCC3 Overflow Trigger"]
319    Tcc3Ovf = 45,
320    #[doc = "46: TCC3 Match/Compare 0 Trigger"]
321    Tcc3Mc0 = 46,
322    #[doc = "47: TCC3 Match/Compare 1 Trigger"]
323    Tcc3Mc1 = 47,
324    #[doc = "48: Match/Compare 2 Trigger"]
325    Tcc3Mc2 = 48,
326    #[doc = "49: Match/Compare 3 Trigger"]
327    Tcc3Mc3 = 49,
328}
329impl From<Trigsrcselect> for u8 {
330    #[inline(always)]
331    fn from(variant: Trigsrcselect) -> Self {
332        variant as _
333    }
334}
335impl crate::FieldSpec for Trigsrcselect {
336    type Ux = u8;
337}
338impl crate::IsEnum for Trigsrcselect {}
339#[doc = "Field `TRIGSRC` reader - Trigger Source"]
340pub type TrigsrcR = crate::FieldReader<Trigsrcselect>;
341impl TrigsrcR {
342    #[doc = "Get enumerated values variant"]
343    #[inline(always)]
344    pub const fn variant(&self) -> Option<Trigsrcselect> {
345        match self.bits {
346            0 => Some(Trigsrcselect::Disable),
347            1 => Some(Trigsrcselect::Sercom0Rx),
348            2 => Some(Trigsrcselect::Sercom0Tx),
349            3 => Some(Trigsrcselect::Sercom1Rx),
350            4 => Some(Trigsrcselect::Sercom1Tx),
351            5 => Some(Trigsrcselect::Sercom2Rx),
352            6 => Some(Trigsrcselect::Sercom2Tx),
353            7 => Some(Trigsrcselect::Sercom3Rx),
354            8 => Some(Trigsrcselect::Sercom3Tx),
355            9 => Some(Trigsrcselect::Sercom4Rx),
356            10 => Some(Trigsrcselect::Sercom4Tx),
357            11 => Some(Trigsrcselect::Sercom5Rx),
358            12 => Some(Trigsrcselect::Sercom5Tx),
359            13 => Some(Trigsrcselect::Tcc0Ovf),
360            14 => Some(Trigsrcselect::Tcc0Mc0),
361            15 => Some(Trigsrcselect::Tcc0Mc1),
362            16 => Some(Trigsrcselect::Tcc0Mc2),
363            17 => Some(Trigsrcselect::Tcc0Mc3),
364            18 => Some(Trigsrcselect::Tcc1Ovf),
365            19 => Some(Trigsrcselect::Tcc1Mc0),
366            20 => Some(Trigsrcselect::Tcc1Mc1),
367            21 => Some(Trigsrcselect::Tcc2Ovf),
368            22 => Some(Trigsrcselect::Tcc2Mc0),
369            23 => Some(Trigsrcselect::Tcc2Mc1),
370            24 => Some(Trigsrcselect::Tc3Ovf),
371            25 => Some(Trigsrcselect::Tc3Mc0),
372            26 => Some(Trigsrcselect::Tc3Mc1),
373            27 => Some(Trigsrcselect::Tc4Ovf),
374            28 => Some(Trigsrcselect::Tc4Mc0),
375            29 => Some(Trigsrcselect::Tc4Mc1),
376            30 => Some(Trigsrcselect::Tc5Ovf),
377            31 => Some(Trigsrcselect::Tc5Mc0),
378            32 => Some(Trigsrcselect::Tc5Mc1),
379            33 => Some(Trigsrcselect::Tc6Ovf),
380            34 => Some(Trigsrcselect::Tc6Mc0),
381            35 => Some(Trigsrcselect::Tc6Mc1),
382            36 => Some(Trigsrcselect::Tc7Ovf),
383            37 => Some(Trigsrcselect::Tc7Mc0),
384            38 => Some(Trigsrcselect::Tc7Mc1),
385            39 => Some(Trigsrcselect::AdcResrdy),
386            40 => Some(Trigsrcselect::DacEmpty),
387            41 => Some(Trigsrcselect::I2sRx0),
388            42 => Some(Trigsrcselect::I2sRx1),
389            43 => Some(Trigsrcselect::I2sTx0),
390            44 => Some(Trigsrcselect::I2sTx1),
391            45 => Some(Trigsrcselect::Tcc3Ovf),
392            46 => Some(Trigsrcselect::Tcc3Mc0),
393            47 => Some(Trigsrcselect::Tcc3Mc1),
394            48 => Some(Trigsrcselect::Tcc3Mc2),
395            49 => Some(Trigsrcselect::Tcc3Mc3),
396            _ => None,
397        }
398    }
399    #[doc = "Only software/event triggers"]
400    #[inline(always)]
401    pub fn is_disable(&self) -> bool {
402        *self == Trigsrcselect::Disable
403    }
404    #[doc = "SERCOM0 RX Trigger"]
405    #[inline(always)]
406    pub fn is_sercom0_rx(&self) -> bool {
407        *self == Trigsrcselect::Sercom0Rx
408    }
409    #[doc = "SERCOM0 TX Trigger"]
410    #[inline(always)]
411    pub fn is_sercom0_tx(&self) -> bool {
412        *self == Trigsrcselect::Sercom0Tx
413    }
414    #[doc = "SERCOM1 RX Trigger"]
415    #[inline(always)]
416    pub fn is_sercom1_rx(&self) -> bool {
417        *self == Trigsrcselect::Sercom1Rx
418    }
419    #[doc = "SERCOM1 TX Trigger"]
420    #[inline(always)]
421    pub fn is_sercom1_tx(&self) -> bool {
422        *self == Trigsrcselect::Sercom1Tx
423    }
424    #[doc = "SERCOM2 RX Trigger"]
425    #[inline(always)]
426    pub fn is_sercom2_rx(&self) -> bool {
427        *self == Trigsrcselect::Sercom2Rx
428    }
429    #[doc = "SERCOM2 TX Trigger"]
430    #[inline(always)]
431    pub fn is_sercom2_tx(&self) -> bool {
432        *self == Trigsrcselect::Sercom2Tx
433    }
434    #[doc = "SERCOM3 RX Trigger"]
435    #[inline(always)]
436    pub fn is_sercom3_rx(&self) -> bool {
437        *self == Trigsrcselect::Sercom3Rx
438    }
439    #[doc = "SERCOM3 TX Trigger"]
440    #[inline(always)]
441    pub fn is_sercom3_tx(&self) -> bool {
442        *self == Trigsrcselect::Sercom3Tx
443    }
444    #[doc = "SERCOM4 RX Trigger"]
445    #[inline(always)]
446    pub fn is_sercom4_rx(&self) -> bool {
447        *self == Trigsrcselect::Sercom4Rx
448    }
449    #[doc = "SERCOM4 TX Trigger"]
450    #[inline(always)]
451    pub fn is_sercom4_tx(&self) -> bool {
452        *self == Trigsrcselect::Sercom4Tx
453    }
454    #[doc = "SERCOM5 RX Trigger"]
455    #[inline(always)]
456    pub fn is_sercom5_rx(&self) -> bool {
457        *self == Trigsrcselect::Sercom5Rx
458    }
459    #[doc = "SERCOM5 TX Trigger"]
460    #[inline(always)]
461    pub fn is_sercom5_tx(&self) -> bool {
462        *self == Trigsrcselect::Sercom5Tx
463    }
464    #[doc = "TCC0 Overflow Trigger"]
465    #[inline(always)]
466    pub fn is_tcc0_ovf(&self) -> bool {
467        *self == Trigsrcselect::Tcc0Ovf
468    }
469    #[doc = "TCC0 Match/Compare 0 Trigger"]
470    #[inline(always)]
471    pub fn is_tcc0_mc0(&self) -> bool {
472        *self == Trigsrcselect::Tcc0Mc0
473    }
474    #[doc = "TCC0 Match/Compare 1 Trigger"]
475    #[inline(always)]
476    pub fn is_tcc0_mc1(&self) -> bool {
477        *self == Trigsrcselect::Tcc0Mc1
478    }
479    #[doc = "TCC0 Match/Compare 2 Trigger"]
480    #[inline(always)]
481    pub fn is_tcc0_mc2(&self) -> bool {
482        *self == Trigsrcselect::Tcc0Mc2
483    }
484    #[doc = "TCC0 Match/Compare 3 Trigger"]
485    #[inline(always)]
486    pub fn is_tcc0_mc3(&self) -> bool {
487        *self == Trigsrcselect::Tcc0Mc3
488    }
489    #[doc = "TCC1 Overflow Trigger"]
490    #[inline(always)]
491    pub fn is_tcc1_ovf(&self) -> bool {
492        *self == Trigsrcselect::Tcc1Ovf
493    }
494    #[doc = "TCC1 Match/Compare 0 Trigger"]
495    #[inline(always)]
496    pub fn is_tcc1_mc0(&self) -> bool {
497        *self == Trigsrcselect::Tcc1Mc0
498    }
499    #[doc = "TCC1 Match/Compare 1 Trigger"]
500    #[inline(always)]
501    pub fn is_tcc1_mc1(&self) -> bool {
502        *self == Trigsrcselect::Tcc1Mc1
503    }
504    #[doc = "TCC2 Overflow Trigger"]
505    #[inline(always)]
506    pub fn is_tcc2_ovf(&self) -> bool {
507        *self == Trigsrcselect::Tcc2Ovf
508    }
509    #[doc = "TCC2 Match/Compare 0 Trigger"]
510    #[inline(always)]
511    pub fn is_tcc2_mc0(&self) -> bool {
512        *self == Trigsrcselect::Tcc2Mc0
513    }
514    #[doc = "TCC2 Match/Compare 1 Trigger"]
515    #[inline(always)]
516    pub fn is_tcc2_mc1(&self) -> bool {
517        *self == Trigsrcselect::Tcc2Mc1
518    }
519    #[doc = "TC3 Overflow Trigger"]
520    #[inline(always)]
521    pub fn is_tc3_ovf(&self) -> bool {
522        *self == Trigsrcselect::Tc3Ovf
523    }
524    #[doc = "TC3 Match/Compare 0 Trigger"]
525    #[inline(always)]
526    pub fn is_tc3_mc0(&self) -> bool {
527        *self == Trigsrcselect::Tc3Mc0
528    }
529    #[doc = "TC3 Match/Compare 1 Trigger"]
530    #[inline(always)]
531    pub fn is_tc3_mc1(&self) -> bool {
532        *self == Trigsrcselect::Tc3Mc1
533    }
534    #[doc = "TC4 Overflow Trigger"]
535    #[inline(always)]
536    pub fn is_tc4_ovf(&self) -> bool {
537        *self == Trigsrcselect::Tc4Ovf
538    }
539    #[doc = "TC4 Match/Compare 0 Trigger"]
540    #[inline(always)]
541    pub fn is_tc4_mc0(&self) -> bool {
542        *self == Trigsrcselect::Tc4Mc0
543    }
544    #[doc = "TC4 Match/Compare 1 Trigger"]
545    #[inline(always)]
546    pub fn is_tc4_mc1(&self) -> bool {
547        *self == Trigsrcselect::Tc4Mc1
548    }
549    #[doc = "TC5 Overflow Trigger"]
550    #[inline(always)]
551    pub fn is_tc5_ovf(&self) -> bool {
552        *self == Trigsrcselect::Tc5Ovf
553    }
554    #[doc = "TC5 Match/Compare 0 Trigger"]
555    #[inline(always)]
556    pub fn is_tc5_mc0(&self) -> bool {
557        *self == Trigsrcselect::Tc5Mc0
558    }
559    #[doc = "TC5 Match/Compare 1 Trigger"]
560    #[inline(always)]
561    pub fn is_tc5_mc1(&self) -> bool {
562        *self == Trigsrcselect::Tc5Mc1
563    }
564    #[doc = "TC6 Overflow Trigger"]
565    #[inline(always)]
566    pub fn is_tc6_ovf(&self) -> bool {
567        *self == Trigsrcselect::Tc6Ovf
568    }
569    #[doc = "TC6 Match/Compare 0 Trigger"]
570    #[inline(always)]
571    pub fn is_tc6_mc0(&self) -> bool {
572        *self == Trigsrcselect::Tc6Mc0
573    }
574    #[doc = "TC6 Match/Compare 1 Trigger"]
575    #[inline(always)]
576    pub fn is_tc6_mc1(&self) -> bool {
577        *self == Trigsrcselect::Tc6Mc1
578    }
579    #[doc = "TC7 Overflow Trigger"]
580    #[inline(always)]
581    pub fn is_tc7_ovf(&self) -> bool {
582        *self == Trigsrcselect::Tc7Ovf
583    }
584    #[doc = "TC7 Match/Compare 0 Trigger"]
585    #[inline(always)]
586    pub fn is_tc7_mc0(&self) -> bool {
587        *self == Trigsrcselect::Tc7Mc0
588    }
589    #[doc = "TC7 Match/Compare 1 Trigger"]
590    #[inline(always)]
591    pub fn is_tc7_mc1(&self) -> bool {
592        *self == Trigsrcselect::Tc7Mc1
593    }
594    #[doc = "ADC Result Ready Trigger"]
595    #[inline(always)]
596    pub fn is_adc_resrdy(&self) -> bool {
597        *self == Trigsrcselect::AdcResrdy
598    }
599    #[doc = "DAC Empty Trigger"]
600    #[inline(always)]
601    pub fn is_dac_empty(&self) -> bool {
602        *self == Trigsrcselect::DacEmpty
603    }
604    #[doc = "I2S RX 0 Trigger"]
605    #[inline(always)]
606    pub fn is_i2s_rx_0(&self) -> bool {
607        *self == Trigsrcselect::I2sRx0
608    }
609    #[doc = "I2S RX 1 Trigger"]
610    #[inline(always)]
611    pub fn is_i2s_rx_1(&self) -> bool {
612        *self == Trigsrcselect::I2sRx1
613    }
614    #[doc = "I2S TX 0 Trigger"]
615    #[inline(always)]
616    pub fn is_i2s_tx_0(&self) -> bool {
617        *self == Trigsrcselect::I2sTx0
618    }
619    #[doc = "I2S TX 1 Trigger"]
620    #[inline(always)]
621    pub fn is_i2s_tx_1(&self) -> bool {
622        *self == Trigsrcselect::I2sTx1
623    }
624    #[doc = "TCC3 Overflow Trigger"]
625    #[inline(always)]
626    pub fn is_tcc3_ovf(&self) -> bool {
627        *self == Trigsrcselect::Tcc3Ovf
628    }
629    #[doc = "TCC3 Match/Compare 0 Trigger"]
630    #[inline(always)]
631    pub fn is_tcc3_mc0(&self) -> bool {
632        *self == Trigsrcselect::Tcc3Mc0
633    }
634    #[doc = "TCC3 Match/Compare 1 Trigger"]
635    #[inline(always)]
636    pub fn is_tcc3_mc1(&self) -> bool {
637        *self == Trigsrcselect::Tcc3Mc1
638    }
639    #[doc = "Match/Compare 2 Trigger"]
640    #[inline(always)]
641    pub fn is_tcc3_mc2(&self) -> bool {
642        *self == Trigsrcselect::Tcc3Mc2
643    }
644    #[doc = "Match/Compare 3 Trigger"]
645    #[inline(always)]
646    pub fn is_tcc3_mc3(&self) -> bool {
647        *self == Trigsrcselect::Tcc3Mc3
648    }
649}
650#[doc = "Field `TRIGSRC` writer - Trigger Source"]
651pub type TrigsrcW<'a, REG> = crate::FieldWriter<'a, REG, 6, Trigsrcselect>;
652impl<'a, REG> TrigsrcW<'a, REG>
653where
654    REG: crate::Writable + crate::RegisterSpec,
655    REG::Ux: From<u8>,
656{
657    #[doc = "Only software/event triggers"]
658    #[inline(always)]
659    pub fn disable(self) -> &'a mut crate::W<REG> {
660        self.variant(Trigsrcselect::Disable)
661    }
662    #[doc = "SERCOM0 RX Trigger"]
663    #[inline(always)]
664    pub fn sercom0_rx(self) -> &'a mut crate::W<REG> {
665        self.variant(Trigsrcselect::Sercom0Rx)
666    }
667    #[doc = "SERCOM0 TX Trigger"]
668    #[inline(always)]
669    pub fn sercom0_tx(self) -> &'a mut crate::W<REG> {
670        self.variant(Trigsrcselect::Sercom0Tx)
671    }
672    #[doc = "SERCOM1 RX Trigger"]
673    #[inline(always)]
674    pub fn sercom1_rx(self) -> &'a mut crate::W<REG> {
675        self.variant(Trigsrcselect::Sercom1Rx)
676    }
677    #[doc = "SERCOM1 TX Trigger"]
678    #[inline(always)]
679    pub fn sercom1_tx(self) -> &'a mut crate::W<REG> {
680        self.variant(Trigsrcselect::Sercom1Tx)
681    }
682    #[doc = "SERCOM2 RX Trigger"]
683    #[inline(always)]
684    pub fn sercom2_rx(self) -> &'a mut crate::W<REG> {
685        self.variant(Trigsrcselect::Sercom2Rx)
686    }
687    #[doc = "SERCOM2 TX Trigger"]
688    #[inline(always)]
689    pub fn sercom2_tx(self) -> &'a mut crate::W<REG> {
690        self.variant(Trigsrcselect::Sercom2Tx)
691    }
692    #[doc = "SERCOM3 RX Trigger"]
693    #[inline(always)]
694    pub fn sercom3_rx(self) -> &'a mut crate::W<REG> {
695        self.variant(Trigsrcselect::Sercom3Rx)
696    }
697    #[doc = "SERCOM3 TX Trigger"]
698    #[inline(always)]
699    pub fn sercom3_tx(self) -> &'a mut crate::W<REG> {
700        self.variant(Trigsrcselect::Sercom3Tx)
701    }
702    #[doc = "SERCOM4 RX Trigger"]
703    #[inline(always)]
704    pub fn sercom4_rx(self) -> &'a mut crate::W<REG> {
705        self.variant(Trigsrcselect::Sercom4Rx)
706    }
707    #[doc = "SERCOM4 TX Trigger"]
708    #[inline(always)]
709    pub fn sercom4_tx(self) -> &'a mut crate::W<REG> {
710        self.variant(Trigsrcselect::Sercom4Tx)
711    }
712    #[doc = "SERCOM5 RX Trigger"]
713    #[inline(always)]
714    pub fn sercom5_rx(self) -> &'a mut crate::W<REG> {
715        self.variant(Trigsrcselect::Sercom5Rx)
716    }
717    #[doc = "SERCOM5 TX Trigger"]
718    #[inline(always)]
719    pub fn sercom5_tx(self) -> &'a mut crate::W<REG> {
720        self.variant(Trigsrcselect::Sercom5Tx)
721    }
722    #[doc = "TCC0 Overflow Trigger"]
723    #[inline(always)]
724    pub fn tcc0_ovf(self) -> &'a mut crate::W<REG> {
725        self.variant(Trigsrcselect::Tcc0Ovf)
726    }
727    #[doc = "TCC0 Match/Compare 0 Trigger"]
728    #[inline(always)]
729    pub fn tcc0_mc0(self) -> &'a mut crate::W<REG> {
730        self.variant(Trigsrcselect::Tcc0Mc0)
731    }
732    #[doc = "TCC0 Match/Compare 1 Trigger"]
733    #[inline(always)]
734    pub fn tcc0_mc1(self) -> &'a mut crate::W<REG> {
735        self.variant(Trigsrcselect::Tcc0Mc1)
736    }
737    #[doc = "TCC0 Match/Compare 2 Trigger"]
738    #[inline(always)]
739    pub fn tcc0_mc2(self) -> &'a mut crate::W<REG> {
740        self.variant(Trigsrcselect::Tcc0Mc2)
741    }
742    #[doc = "TCC0 Match/Compare 3 Trigger"]
743    #[inline(always)]
744    pub fn tcc0_mc3(self) -> &'a mut crate::W<REG> {
745        self.variant(Trigsrcselect::Tcc0Mc3)
746    }
747    #[doc = "TCC1 Overflow Trigger"]
748    #[inline(always)]
749    pub fn tcc1_ovf(self) -> &'a mut crate::W<REG> {
750        self.variant(Trigsrcselect::Tcc1Ovf)
751    }
752    #[doc = "TCC1 Match/Compare 0 Trigger"]
753    #[inline(always)]
754    pub fn tcc1_mc0(self) -> &'a mut crate::W<REG> {
755        self.variant(Trigsrcselect::Tcc1Mc0)
756    }
757    #[doc = "TCC1 Match/Compare 1 Trigger"]
758    #[inline(always)]
759    pub fn tcc1_mc1(self) -> &'a mut crate::W<REG> {
760        self.variant(Trigsrcselect::Tcc1Mc1)
761    }
762    #[doc = "TCC2 Overflow Trigger"]
763    #[inline(always)]
764    pub fn tcc2_ovf(self) -> &'a mut crate::W<REG> {
765        self.variant(Trigsrcselect::Tcc2Ovf)
766    }
767    #[doc = "TCC2 Match/Compare 0 Trigger"]
768    #[inline(always)]
769    pub fn tcc2_mc0(self) -> &'a mut crate::W<REG> {
770        self.variant(Trigsrcselect::Tcc2Mc0)
771    }
772    #[doc = "TCC2 Match/Compare 1 Trigger"]
773    #[inline(always)]
774    pub fn tcc2_mc1(self) -> &'a mut crate::W<REG> {
775        self.variant(Trigsrcselect::Tcc2Mc1)
776    }
777    #[doc = "TC3 Overflow Trigger"]
778    #[inline(always)]
779    pub fn tc3_ovf(self) -> &'a mut crate::W<REG> {
780        self.variant(Trigsrcselect::Tc3Ovf)
781    }
782    #[doc = "TC3 Match/Compare 0 Trigger"]
783    #[inline(always)]
784    pub fn tc3_mc0(self) -> &'a mut crate::W<REG> {
785        self.variant(Trigsrcselect::Tc3Mc0)
786    }
787    #[doc = "TC3 Match/Compare 1 Trigger"]
788    #[inline(always)]
789    pub fn tc3_mc1(self) -> &'a mut crate::W<REG> {
790        self.variant(Trigsrcselect::Tc3Mc1)
791    }
792    #[doc = "TC4 Overflow Trigger"]
793    #[inline(always)]
794    pub fn tc4_ovf(self) -> &'a mut crate::W<REG> {
795        self.variant(Trigsrcselect::Tc4Ovf)
796    }
797    #[doc = "TC4 Match/Compare 0 Trigger"]
798    #[inline(always)]
799    pub fn tc4_mc0(self) -> &'a mut crate::W<REG> {
800        self.variant(Trigsrcselect::Tc4Mc0)
801    }
802    #[doc = "TC4 Match/Compare 1 Trigger"]
803    #[inline(always)]
804    pub fn tc4_mc1(self) -> &'a mut crate::W<REG> {
805        self.variant(Trigsrcselect::Tc4Mc1)
806    }
807    #[doc = "TC5 Overflow Trigger"]
808    #[inline(always)]
809    pub fn tc5_ovf(self) -> &'a mut crate::W<REG> {
810        self.variant(Trigsrcselect::Tc5Ovf)
811    }
812    #[doc = "TC5 Match/Compare 0 Trigger"]
813    #[inline(always)]
814    pub fn tc5_mc0(self) -> &'a mut crate::W<REG> {
815        self.variant(Trigsrcselect::Tc5Mc0)
816    }
817    #[doc = "TC5 Match/Compare 1 Trigger"]
818    #[inline(always)]
819    pub fn tc5_mc1(self) -> &'a mut crate::W<REG> {
820        self.variant(Trigsrcselect::Tc5Mc1)
821    }
822    #[doc = "TC6 Overflow Trigger"]
823    #[inline(always)]
824    pub fn tc6_ovf(self) -> &'a mut crate::W<REG> {
825        self.variant(Trigsrcselect::Tc6Ovf)
826    }
827    #[doc = "TC6 Match/Compare 0 Trigger"]
828    #[inline(always)]
829    pub fn tc6_mc0(self) -> &'a mut crate::W<REG> {
830        self.variant(Trigsrcselect::Tc6Mc0)
831    }
832    #[doc = "TC6 Match/Compare 1 Trigger"]
833    #[inline(always)]
834    pub fn tc6_mc1(self) -> &'a mut crate::W<REG> {
835        self.variant(Trigsrcselect::Tc6Mc1)
836    }
837    #[doc = "TC7 Overflow Trigger"]
838    #[inline(always)]
839    pub fn tc7_ovf(self) -> &'a mut crate::W<REG> {
840        self.variant(Trigsrcselect::Tc7Ovf)
841    }
842    #[doc = "TC7 Match/Compare 0 Trigger"]
843    #[inline(always)]
844    pub fn tc7_mc0(self) -> &'a mut crate::W<REG> {
845        self.variant(Trigsrcselect::Tc7Mc0)
846    }
847    #[doc = "TC7 Match/Compare 1 Trigger"]
848    #[inline(always)]
849    pub fn tc7_mc1(self) -> &'a mut crate::W<REG> {
850        self.variant(Trigsrcselect::Tc7Mc1)
851    }
852    #[doc = "ADC Result Ready Trigger"]
853    #[inline(always)]
854    pub fn adc_resrdy(self) -> &'a mut crate::W<REG> {
855        self.variant(Trigsrcselect::AdcResrdy)
856    }
857    #[doc = "DAC Empty Trigger"]
858    #[inline(always)]
859    pub fn dac_empty(self) -> &'a mut crate::W<REG> {
860        self.variant(Trigsrcselect::DacEmpty)
861    }
862    #[doc = "I2S RX 0 Trigger"]
863    #[inline(always)]
864    pub fn i2s_rx_0(self) -> &'a mut crate::W<REG> {
865        self.variant(Trigsrcselect::I2sRx0)
866    }
867    #[doc = "I2S RX 1 Trigger"]
868    #[inline(always)]
869    pub fn i2s_rx_1(self) -> &'a mut crate::W<REG> {
870        self.variant(Trigsrcselect::I2sRx1)
871    }
872    #[doc = "I2S TX 0 Trigger"]
873    #[inline(always)]
874    pub fn i2s_tx_0(self) -> &'a mut crate::W<REG> {
875        self.variant(Trigsrcselect::I2sTx0)
876    }
877    #[doc = "I2S TX 1 Trigger"]
878    #[inline(always)]
879    pub fn i2s_tx_1(self) -> &'a mut crate::W<REG> {
880        self.variant(Trigsrcselect::I2sTx1)
881    }
882    #[doc = "TCC3 Overflow Trigger"]
883    #[inline(always)]
884    pub fn tcc3_ovf(self) -> &'a mut crate::W<REG> {
885        self.variant(Trigsrcselect::Tcc3Ovf)
886    }
887    #[doc = "TCC3 Match/Compare 0 Trigger"]
888    #[inline(always)]
889    pub fn tcc3_mc0(self) -> &'a mut crate::W<REG> {
890        self.variant(Trigsrcselect::Tcc3Mc0)
891    }
892    #[doc = "TCC3 Match/Compare 1 Trigger"]
893    #[inline(always)]
894    pub fn tcc3_mc1(self) -> &'a mut crate::W<REG> {
895        self.variant(Trigsrcselect::Tcc3Mc1)
896    }
897    #[doc = "Match/Compare 2 Trigger"]
898    #[inline(always)]
899    pub fn tcc3_mc2(self) -> &'a mut crate::W<REG> {
900        self.variant(Trigsrcselect::Tcc3Mc2)
901    }
902    #[doc = "Match/Compare 3 Trigger"]
903    #[inline(always)]
904    pub fn tcc3_mc3(self) -> &'a mut crate::W<REG> {
905        self.variant(Trigsrcselect::Tcc3Mc3)
906    }
907}
908#[doc = "Trigger Action\n\nValue on reset: 0"]
909#[derive(Clone, Copy, Debug, PartialEq, Eq)]
910#[repr(u8)]
911pub enum Trigactselect {
912    #[doc = "0: One trigger required for each block transfer"]
913    Block = 0,
914    #[doc = "2: One trigger required for each beat transfer"]
915    Beat = 2,
916    #[doc = "3: One trigger required for each transaction"]
917    Transaction = 3,
918}
919impl From<Trigactselect> for u8 {
920    #[inline(always)]
921    fn from(variant: Trigactselect) -> Self {
922        variant as _
923    }
924}
925impl crate::FieldSpec for Trigactselect {
926    type Ux = u8;
927}
928impl crate::IsEnum for Trigactselect {}
929#[doc = "Field `TRIGACT` reader - Trigger Action"]
930pub type TrigactR = crate::FieldReader<Trigactselect>;
931impl TrigactR {
932    #[doc = "Get enumerated values variant"]
933    #[inline(always)]
934    pub const fn variant(&self) -> Option<Trigactselect> {
935        match self.bits {
936            0 => Some(Trigactselect::Block),
937            2 => Some(Trigactselect::Beat),
938            3 => Some(Trigactselect::Transaction),
939            _ => None,
940        }
941    }
942    #[doc = "One trigger required for each block transfer"]
943    #[inline(always)]
944    pub fn is_block(&self) -> bool {
945        *self == Trigactselect::Block
946    }
947    #[doc = "One trigger required for each beat transfer"]
948    #[inline(always)]
949    pub fn is_beat(&self) -> bool {
950        *self == Trigactselect::Beat
951    }
952    #[doc = "One trigger required for each transaction"]
953    #[inline(always)]
954    pub fn is_transaction(&self) -> bool {
955        *self == Trigactselect::Transaction
956    }
957}
958#[doc = "Field `TRIGACT` writer - Trigger Action"]
959pub type TrigactW<'a, REG> = crate::FieldWriter<'a, REG, 2, Trigactselect>;
960impl<'a, REG> TrigactW<'a, REG>
961where
962    REG: crate::Writable + crate::RegisterSpec,
963    REG::Ux: From<u8>,
964{
965    #[doc = "One trigger required for each block transfer"]
966    #[inline(always)]
967    pub fn block(self) -> &'a mut crate::W<REG> {
968        self.variant(Trigactselect::Block)
969    }
970    #[doc = "One trigger required for each beat transfer"]
971    #[inline(always)]
972    pub fn beat(self) -> &'a mut crate::W<REG> {
973        self.variant(Trigactselect::Beat)
974    }
975    #[doc = "One trigger required for each transaction"]
976    #[inline(always)]
977    pub fn transaction(self) -> &'a mut crate::W<REG> {
978        self.variant(Trigactselect::Transaction)
979    }
980}
981#[doc = "Software Command\n\nValue on reset: 0"]
982#[derive(Clone, Copy, Debug, PartialEq, Eq)]
983#[repr(u8)]
984pub enum Cmdselect {
985    #[doc = "0: No action"]
986    Noact = 0,
987    #[doc = "1: Channel suspend operation"]
988    Suspend = 1,
989    #[doc = "2: Channel resume operation"]
990    Resume = 2,
991}
992impl From<Cmdselect> for u8 {
993    #[inline(always)]
994    fn from(variant: Cmdselect) -> Self {
995        variant as _
996    }
997}
998impl crate::FieldSpec for Cmdselect {
999    type Ux = u8;
1000}
1001impl crate::IsEnum for Cmdselect {}
1002#[doc = "Field `CMD` reader - Software Command"]
1003pub type CmdR = crate::FieldReader<Cmdselect>;
1004impl CmdR {
1005    #[doc = "Get enumerated values variant"]
1006    #[inline(always)]
1007    pub const fn variant(&self) -> Option<Cmdselect> {
1008        match self.bits {
1009            0 => Some(Cmdselect::Noact),
1010            1 => Some(Cmdselect::Suspend),
1011            2 => Some(Cmdselect::Resume),
1012            _ => None,
1013        }
1014    }
1015    #[doc = "No action"]
1016    #[inline(always)]
1017    pub fn is_noact(&self) -> bool {
1018        *self == Cmdselect::Noact
1019    }
1020    #[doc = "Channel suspend operation"]
1021    #[inline(always)]
1022    pub fn is_suspend(&self) -> bool {
1023        *self == Cmdselect::Suspend
1024    }
1025    #[doc = "Channel resume operation"]
1026    #[inline(always)]
1027    pub fn is_resume(&self) -> bool {
1028        *self == Cmdselect::Resume
1029    }
1030}
1031#[doc = "Field `CMD` writer - Software Command"]
1032pub type CmdW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cmdselect>;
1033impl<'a, REG> CmdW<'a, REG>
1034where
1035    REG: crate::Writable + crate::RegisterSpec,
1036    REG::Ux: From<u8>,
1037{
1038    #[doc = "No action"]
1039    #[inline(always)]
1040    pub fn noact(self) -> &'a mut crate::W<REG> {
1041        self.variant(Cmdselect::Noact)
1042    }
1043    #[doc = "Channel suspend operation"]
1044    #[inline(always)]
1045    pub fn suspend(self) -> &'a mut crate::W<REG> {
1046        self.variant(Cmdselect::Suspend)
1047    }
1048    #[doc = "Channel resume operation"]
1049    #[inline(always)]
1050    pub fn resume(self) -> &'a mut crate::W<REG> {
1051        self.variant(Cmdselect::Resume)
1052    }
1053}
1054impl R {
1055    #[doc = "Bits 0:2 - Event Input Action"]
1056    #[inline(always)]
1057    pub fn evact(&self) -> EvactR {
1058        EvactR::new((self.bits & 7) as u8)
1059    }
1060    #[doc = "Bit 3 - Channel Event Input Enable"]
1061    #[inline(always)]
1062    pub fn evie(&self) -> EvieR {
1063        EvieR::new(((self.bits >> 3) & 1) != 0)
1064    }
1065    #[doc = "Bit 4 - Channel Event Output Enable"]
1066    #[inline(always)]
1067    pub fn evoe(&self) -> EvoeR {
1068        EvoeR::new(((self.bits >> 4) & 1) != 0)
1069    }
1070    #[doc = "Bits 5:6 - Channel Arbitration Level"]
1071    #[inline(always)]
1072    pub fn lvl(&self) -> LvlR {
1073        LvlR::new(((self.bits >> 5) & 3) as u8)
1074    }
1075    #[doc = "Bits 8:13 - Trigger Source"]
1076    #[inline(always)]
1077    pub fn trigsrc(&self) -> TrigsrcR {
1078        TrigsrcR::new(((self.bits >> 8) & 0x3f) as u8)
1079    }
1080    #[doc = "Bits 22:23 - Trigger Action"]
1081    #[inline(always)]
1082    pub fn trigact(&self) -> TrigactR {
1083        TrigactR::new(((self.bits >> 22) & 3) as u8)
1084    }
1085    #[doc = "Bits 24:25 - Software Command"]
1086    #[inline(always)]
1087    pub fn cmd(&self) -> CmdR {
1088        CmdR::new(((self.bits >> 24) & 3) as u8)
1089    }
1090}
1091impl W {
1092    #[doc = "Bits 0:2 - Event Input Action"]
1093    #[inline(always)]
1094    #[must_use]
1095    pub fn evact(&mut self) -> EvactW<ChctrlbSpec> {
1096        EvactW::new(self, 0)
1097    }
1098    #[doc = "Bit 3 - Channel Event Input Enable"]
1099    #[inline(always)]
1100    #[must_use]
1101    pub fn evie(&mut self) -> EvieW<ChctrlbSpec> {
1102        EvieW::new(self, 3)
1103    }
1104    #[doc = "Bit 4 - Channel Event Output Enable"]
1105    #[inline(always)]
1106    #[must_use]
1107    pub fn evoe(&mut self) -> EvoeW<ChctrlbSpec> {
1108        EvoeW::new(self, 4)
1109    }
1110    #[doc = "Bits 5:6 - Channel Arbitration Level"]
1111    #[inline(always)]
1112    #[must_use]
1113    pub fn lvl(&mut self) -> LvlW<ChctrlbSpec> {
1114        LvlW::new(self, 5)
1115    }
1116    #[doc = "Bits 8:13 - Trigger Source"]
1117    #[inline(always)]
1118    #[must_use]
1119    pub fn trigsrc(&mut self) -> TrigsrcW<ChctrlbSpec> {
1120        TrigsrcW::new(self, 8)
1121    }
1122    #[doc = "Bits 22:23 - Trigger Action"]
1123    #[inline(always)]
1124    #[must_use]
1125    pub fn trigact(&mut self) -> TrigactW<ChctrlbSpec> {
1126        TrigactW::new(self, 22)
1127    }
1128    #[doc = "Bits 24:25 - Software Command"]
1129    #[inline(always)]
1130    #[must_use]
1131    pub fn cmd(&mut self) -> CmdW<ChctrlbSpec> {
1132        CmdW::new(self, 24)
1133    }
1134}
1135#[doc = "Channel Control B\n\nYou can [`read`](crate::Reg::read) this register and get [`chctrlb::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chctrlb::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1136pub struct ChctrlbSpec;
1137impl crate::RegisterSpec for ChctrlbSpec {
1138    type Ux = u32;
1139}
1140#[doc = "`read()` method returns [`chctrlb::R`](R) reader structure"]
1141impl crate::Readable for ChctrlbSpec {}
1142#[doc = "`write(|w| ..)` method takes [`chctrlb::W`](W) writer structure"]
1143impl crate::Writable for ChctrlbSpec {
1144    type Safety = crate::Unsafe;
1145    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1146    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1147}
1148#[doc = "`reset()` method sets CHCTRLB to value 0"]
1149impl crate::Resettable for ChctrlbSpec {
1150    const RESET_VALUE: u32 = 0;
1151}
atsamd21g/dmac/chctrlb.rs

atsamd21g/dmac/
chctrlb.rs
