atsamd21j/i2s/
serctrl.rs

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1#[doc = "Register `SERCTRL%s` reader"]
2pub type R = crate::R<SerctrlSpec>;
3#[doc = "Register `SERCTRL%s` writer"]
4pub type W = crate::W<SerctrlSpec>;
5#[doc = "Serializer Mode\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Sermodeselect {
9    #[doc = "0: Receive"]
10    Rx = 0,
11    #[doc = "1: Transmit"]
12    Tx = 1,
13    #[doc = "2: Receive one PDM data on each serial clock edge"]
14    Pdm2 = 2,
15}
16impl From<Sermodeselect> for u8 {
17    #[inline(always)]
18    fn from(variant: Sermodeselect) -> Self {
19        variant as _
20    }
21}
22impl crate::FieldSpec for Sermodeselect {
23    type Ux = u8;
24}
25impl crate::IsEnum for Sermodeselect {}
26#[doc = "Field `SERMODE` reader - Serializer Mode"]
27pub type SermodeR = crate::FieldReader<Sermodeselect>;
28impl SermodeR {
29    #[doc = "Get enumerated values variant"]
30    #[inline(always)]
31    pub const fn variant(&self) -> Option<Sermodeselect> {
32        match self.bits {
33            0 => Some(Sermodeselect::Rx),
34            1 => Some(Sermodeselect::Tx),
35            2 => Some(Sermodeselect::Pdm2),
36            _ => None,
37        }
38    }
39    #[doc = "Receive"]
40    #[inline(always)]
41    pub fn is_rx(&self) -> bool {
42        *self == Sermodeselect::Rx
43    }
44    #[doc = "Transmit"]
45    #[inline(always)]
46    pub fn is_tx(&self) -> bool {
47        *self == Sermodeselect::Tx
48    }
49    #[doc = "Receive one PDM data on each serial clock edge"]
50    #[inline(always)]
51    pub fn is_pdm2(&self) -> bool {
52        *self == Sermodeselect::Pdm2
53    }
54}
55#[doc = "Field `SERMODE` writer - Serializer Mode"]
56pub type SermodeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Sermodeselect>;
57impl<'a, REG> SermodeW<'a, REG>
58where
59    REG: crate::Writable + crate::RegisterSpec,
60    REG::Ux: From<u8>,
61{
62    #[doc = "Receive"]
63    #[inline(always)]
64    pub fn rx(self) -> &'a mut crate::W<REG> {
65        self.variant(Sermodeselect::Rx)
66    }
67    #[doc = "Transmit"]
68    #[inline(always)]
69    pub fn tx(self) -> &'a mut crate::W<REG> {
70        self.variant(Sermodeselect::Tx)
71    }
72    #[doc = "Receive one PDM data on each serial clock edge"]
73    #[inline(always)]
74    pub fn pdm2(self) -> &'a mut crate::W<REG> {
75        self.variant(Sermodeselect::Pdm2)
76    }
77}
78#[doc = "Line Default Line when Slot Disabled\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80#[repr(u8)]
81pub enum Txdefaultselect {
82    #[doc = "0: Output Default Value is 0"]
83    Zero = 0,
84    #[doc = "1: Output Default Value is 1"]
85    One = 1,
86    #[doc = "3: Output Default Value is high impedance"]
87    Hiz = 3,
88}
89impl From<Txdefaultselect> for u8 {
90    #[inline(always)]
91    fn from(variant: Txdefaultselect) -> Self {
92        variant as _
93    }
94}
95impl crate::FieldSpec for Txdefaultselect {
96    type Ux = u8;
97}
98impl crate::IsEnum for Txdefaultselect {}
99#[doc = "Field `TXDEFAULT` reader - Line Default Line when Slot Disabled"]
100pub type TxdefaultR = crate::FieldReader<Txdefaultselect>;
101impl TxdefaultR {
102    #[doc = "Get enumerated values variant"]
103    #[inline(always)]
104    pub const fn variant(&self) -> Option<Txdefaultselect> {
105        match self.bits {
106            0 => Some(Txdefaultselect::Zero),
107            1 => Some(Txdefaultselect::One),
108            3 => Some(Txdefaultselect::Hiz),
109            _ => None,
110        }
111    }
112    #[doc = "Output Default Value is 0"]
113    #[inline(always)]
114    pub fn is_zero(&self) -> bool {
115        *self == Txdefaultselect::Zero
116    }
117    #[doc = "Output Default Value is 1"]
118    #[inline(always)]
119    pub fn is_one(&self) -> bool {
120        *self == Txdefaultselect::One
121    }
122    #[doc = "Output Default Value is high impedance"]
123    #[inline(always)]
124    pub fn is_hiz(&self) -> bool {
125        *self == Txdefaultselect::Hiz
126    }
127}
128#[doc = "Field `TXDEFAULT` writer - Line Default Line when Slot Disabled"]
129pub type TxdefaultW<'a, REG> = crate::FieldWriter<'a, REG, 2, Txdefaultselect>;
130impl<'a, REG> TxdefaultW<'a, REG>
131where
132    REG: crate::Writable + crate::RegisterSpec,
133    REG::Ux: From<u8>,
134{
135    #[doc = "Output Default Value is 0"]
136    #[inline(always)]
137    pub fn zero(self) -> &'a mut crate::W<REG> {
138        self.variant(Txdefaultselect::Zero)
139    }
140    #[doc = "Output Default Value is 1"]
141    #[inline(always)]
142    pub fn one(self) -> &'a mut crate::W<REG> {
143        self.variant(Txdefaultselect::One)
144    }
145    #[doc = "Output Default Value is high impedance"]
146    #[inline(always)]
147    pub fn hiz(self) -> &'a mut crate::W<REG> {
148        self.variant(Txdefaultselect::Hiz)
149    }
150}
151#[doc = "Transmit Data when Underrun\n\nValue on reset: 0"]
152#[derive(Clone, Copy, Debug, PartialEq, Eq)]
153pub enum Txsameselect {
154    #[doc = "0: Zero data transmitted in case of underrun"]
155    Zero = 0,
156    #[doc = "1: Last data transmitted in case of underrun"]
157    Same = 1,
158}
159impl From<Txsameselect> for bool {
160    #[inline(always)]
161    fn from(variant: Txsameselect) -> Self {
162        variant as u8 != 0
163    }
164}
165#[doc = "Field `TXSAME` reader - Transmit Data when Underrun"]
166pub type TxsameR = crate::BitReader<Txsameselect>;
167impl TxsameR {
168    #[doc = "Get enumerated values variant"]
169    #[inline(always)]
170    pub const fn variant(&self) -> Txsameselect {
171        match self.bits {
172            false => Txsameselect::Zero,
173            true => Txsameselect::Same,
174        }
175    }
176    #[doc = "Zero data transmitted in case of underrun"]
177    #[inline(always)]
178    pub fn is_zero(&self) -> bool {
179        *self == Txsameselect::Zero
180    }
181    #[doc = "Last data transmitted in case of underrun"]
182    #[inline(always)]
183    pub fn is_same(&self) -> bool {
184        *self == Txsameselect::Same
185    }
186}
187#[doc = "Field `TXSAME` writer - Transmit Data when Underrun"]
188pub type TxsameW<'a, REG> = crate::BitWriter<'a, REG, Txsameselect>;
189impl<'a, REG> TxsameW<'a, REG>
190where
191    REG: crate::Writable + crate::RegisterSpec,
192{
193    #[doc = "Zero data transmitted in case of underrun"]
194    #[inline(always)]
195    pub fn zero(self) -> &'a mut crate::W<REG> {
196        self.variant(Txsameselect::Zero)
197    }
198    #[doc = "Last data transmitted in case of underrun"]
199    #[inline(always)]
200    pub fn same(self) -> &'a mut crate::W<REG> {
201        self.variant(Txsameselect::Same)
202    }
203}
204#[doc = "Clock Unit Selection\n\nValue on reset: 0"]
205#[derive(Clone, Copy, Debug, PartialEq, Eq)]
206pub enum Clkselselect {
207    #[doc = "0: Use Clock Unit 0"]
208    Clk0 = 0,
209    #[doc = "1: Use Clock Unit 1"]
210    Clk1 = 1,
211}
212impl From<Clkselselect> for bool {
213    #[inline(always)]
214    fn from(variant: Clkselselect) -> Self {
215        variant as u8 != 0
216    }
217}
218#[doc = "Field `CLKSEL` reader - Clock Unit Selection"]
219pub type ClkselR = crate::BitReader<Clkselselect>;
220impl ClkselR {
221    #[doc = "Get enumerated values variant"]
222    #[inline(always)]
223    pub const fn variant(&self) -> Clkselselect {
224        match self.bits {
225            false => Clkselselect::Clk0,
226            true => Clkselselect::Clk1,
227        }
228    }
229    #[doc = "Use Clock Unit 0"]
230    #[inline(always)]
231    pub fn is_clk0(&self) -> bool {
232        *self == Clkselselect::Clk0
233    }
234    #[doc = "Use Clock Unit 1"]
235    #[inline(always)]
236    pub fn is_clk1(&self) -> bool {
237        *self == Clkselselect::Clk1
238    }
239}
240#[doc = "Field `CLKSEL` writer - Clock Unit Selection"]
241pub type ClkselW<'a, REG> = crate::BitWriter<'a, REG, Clkselselect>;
242impl<'a, REG> ClkselW<'a, REG>
243where
244    REG: crate::Writable + crate::RegisterSpec,
245{
246    #[doc = "Use Clock Unit 0"]
247    #[inline(always)]
248    pub fn clk0(self) -> &'a mut crate::W<REG> {
249        self.variant(Clkselselect::Clk0)
250    }
251    #[doc = "Use Clock Unit 1"]
252    #[inline(always)]
253    pub fn clk1(self) -> &'a mut crate::W<REG> {
254        self.variant(Clkselselect::Clk1)
255    }
256}
257#[doc = "Data Slot Formatting Adjust\n\nValue on reset: 0"]
258#[derive(Clone, Copy, Debug, PartialEq, Eq)]
259pub enum Slotadjselect {
260    #[doc = "0: Data is right adjusted in slot"]
261    Right = 0,
262    #[doc = "1: Data is left adjusted in slot"]
263    Left = 1,
264}
265impl From<Slotadjselect> for bool {
266    #[inline(always)]
267    fn from(variant: Slotadjselect) -> Self {
268        variant as u8 != 0
269    }
270}
271#[doc = "Field `SLOTADJ` reader - Data Slot Formatting Adjust"]
272pub type SlotadjR = crate::BitReader<Slotadjselect>;
273impl SlotadjR {
274    #[doc = "Get enumerated values variant"]
275    #[inline(always)]
276    pub const fn variant(&self) -> Slotadjselect {
277        match self.bits {
278            false => Slotadjselect::Right,
279            true => Slotadjselect::Left,
280        }
281    }
282    #[doc = "Data is right adjusted in slot"]
283    #[inline(always)]
284    pub fn is_right(&self) -> bool {
285        *self == Slotadjselect::Right
286    }
287    #[doc = "Data is left adjusted in slot"]
288    #[inline(always)]
289    pub fn is_left(&self) -> bool {
290        *self == Slotadjselect::Left
291    }
292}
293#[doc = "Field `SLOTADJ` writer - Data Slot Formatting Adjust"]
294pub type SlotadjW<'a, REG> = crate::BitWriter<'a, REG, Slotadjselect>;
295impl<'a, REG> SlotadjW<'a, REG>
296where
297    REG: crate::Writable + crate::RegisterSpec,
298{
299    #[doc = "Data is right adjusted in slot"]
300    #[inline(always)]
301    pub fn right(self) -> &'a mut crate::W<REG> {
302        self.variant(Slotadjselect::Right)
303    }
304    #[doc = "Data is left adjusted in slot"]
305    #[inline(always)]
306    pub fn left(self) -> &'a mut crate::W<REG> {
307        self.variant(Slotadjselect::Left)
308    }
309}
310#[doc = "Data Word Size\n\nValue on reset: 0"]
311#[derive(Clone, Copy, Debug, PartialEq, Eq)]
312#[repr(u8)]
313pub enum Datasizeselect {
314    #[doc = "0: 32 bits"]
315    _32 = 0,
316    #[doc = "1: 24 bits"]
317    _24 = 1,
318    #[doc = "2: 20 bits"]
319    _20 = 2,
320    #[doc = "3: 18 bits"]
321    _18 = 3,
322    #[doc = "4: 16 bits"]
323    _16 = 4,
324    #[doc = "5: 16 bits compact stereo"]
325    _16c = 5,
326    #[doc = "6: 8 bits"]
327    _8 = 6,
328    #[doc = "7: 8 bits compact stereo"]
329    _8c = 7,
330}
331impl From<Datasizeselect> for u8 {
332    #[inline(always)]
333    fn from(variant: Datasizeselect) -> Self {
334        variant as _
335    }
336}
337impl crate::FieldSpec for Datasizeselect {
338    type Ux = u8;
339}
340impl crate::IsEnum for Datasizeselect {}
341#[doc = "Field `DATASIZE` reader - Data Word Size"]
342pub type DatasizeR = crate::FieldReader<Datasizeselect>;
343impl DatasizeR {
344    #[doc = "Get enumerated values variant"]
345    #[inline(always)]
346    pub const fn variant(&self) -> Datasizeselect {
347        match self.bits {
348            0 => Datasizeselect::_32,
349            1 => Datasizeselect::_24,
350            2 => Datasizeselect::_20,
351            3 => Datasizeselect::_18,
352            4 => Datasizeselect::_16,
353            5 => Datasizeselect::_16c,
354            6 => Datasizeselect::_8,
355            7 => Datasizeselect::_8c,
356            _ => unreachable!(),
357        }
358    }
359    #[doc = "32 bits"]
360    #[inline(always)]
361    pub fn is_32(&self) -> bool {
362        *self == Datasizeselect::_32
363    }
364    #[doc = "24 bits"]
365    #[inline(always)]
366    pub fn is_24(&self) -> bool {
367        *self == Datasizeselect::_24
368    }
369    #[doc = "20 bits"]
370    #[inline(always)]
371    pub fn is_20(&self) -> bool {
372        *self == Datasizeselect::_20
373    }
374    #[doc = "18 bits"]
375    #[inline(always)]
376    pub fn is_18(&self) -> bool {
377        *self == Datasizeselect::_18
378    }
379    #[doc = "16 bits"]
380    #[inline(always)]
381    pub fn is_16(&self) -> bool {
382        *self == Datasizeselect::_16
383    }
384    #[doc = "16 bits compact stereo"]
385    #[inline(always)]
386    pub fn is_16c(&self) -> bool {
387        *self == Datasizeselect::_16c
388    }
389    #[doc = "8 bits"]
390    #[inline(always)]
391    pub fn is_8(&self) -> bool {
392        *self == Datasizeselect::_8
393    }
394    #[doc = "8 bits compact stereo"]
395    #[inline(always)]
396    pub fn is_8c(&self) -> bool {
397        *self == Datasizeselect::_8c
398    }
399}
400#[doc = "Field `DATASIZE` writer - Data Word Size"]
401pub type DatasizeW<'a, REG> = crate::FieldWriter<'a, REG, 3, Datasizeselect, crate::Safe>;
402impl<'a, REG> DatasizeW<'a, REG>
403where
404    REG: crate::Writable + crate::RegisterSpec,
405    REG::Ux: From<u8>,
406{
407    #[doc = "32 bits"]
408    #[inline(always)]
409    pub fn _32(self) -> &'a mut crate::W<REG> {
410        self.variant(Datasizeselect::_32)
411    }
412    #[doc = "24 bits"]
413    #[inline(always)]
414    pub fn _24(self) -> &'a mut crate::W<REG> {
415        self.variant(Datasizeselect::_24)
416    }
417    #[doc = "20 bits"]
418    #[inline(always)]
419    pub fn _20(self) -> &'a mut crate::W<REG> {
420        self.variant(Datasizeselect::_20)
421    }
422    #[doc = "18 bits"]
423    #[inline(always)]
424    pub fn _18(self) -> &'a mut crate::W<REG> {
425        self.variant(Datasizeselect::_18)
426    }
427    #[doc = "16 bits"]
428    #[inline(always)]
429    pub fn _16(self) -> &'a mut crate::W<REG> {
430        self.variant(Datasizeselect::_16)
431    }
432    #[doc = "16 bits compact stereo"]
433    #[inline(always)]
434    pub fn _16c(self) -> &'a mut crate::W<REG> {
435        self.variant(Datasizeselect::_16c)
436    }
437    #[doc = "8 bits"]
438    #[inline(always)]
439    pub fn _8(self) -> &'a mut crate::W<REG> {
440        self.variant(Datasizeselect::_8)
441    }
442    #[doc = "8 bits compact stereo"]
443    #[inline(always)]
444    pub fn _8c(self) -> &'a mut crate::W<REG> {
445        self.variant(Datasizeselect::_8c)
446    }
447}
448#[doc = "Data Word Formatting Adjust\n\nValue on reset: 0"]
449#[derive(Clone, Copy, Debug, PartialEq, Eq)]
450pub enum Wordadjselect {
451    #[doc = "0: Data is right adjusted in word"]
452    Right = 0,
453    #[doc = "1: Data is left adjusted in word"]
454    Left = 1,
455}
456impl From<Wordadjselect> for bool {
457    #[inline(always)]
458    fn from(variant: Wordadjselect) -> Self {
459        variant as u8 != 0
460    }
461}
462#[doc = "Field `WORDADJ` reader - Data Word Formatting Adjust"]
463pub type WordadjR = crate::BitReader<Wordadjselect>;
464impl WordadjR {
465    #[doc = "Get enumerated values variant"]
466    #[inline(always)]
467    pub const fn variant(&self) -> Wordadjselect {
468        match self.bits {
469            false => Wordadjselect::Right,
470            true => Wordadjselect::Left,
471        }
472    }
473    #[doc = "Data is right adjusted in word"]
474    #[inline(always)]
475    pub fn is_right(&self) -> bool {
476        *self == Wordadjselect::Right
477    }
478    #[doc = "Data is left adjusted in word"]
479    #[inline(always)]
480    pub fn is_left(&self) -> bool {
481        *self == Wordadjselect::Left
482    }
483}
484#[doc = "Field `WORDADJ` writer - Data Word Formatting Adjust"]
485pub type WordadjW<'a, REG> = crate::BitWriter<'a, REG, Wordadjselect>;
486impl<'a, REG> WordadjW<'a, REG>
487where
488    REG: crate::Writable + crate::RegisterSpec,
489{
490    #[doc = "Data is right adjusted in word"]
491    #[inline(always)]
492    pub fn right(self) -> &'a mut crate::W<REG> {
493        self.variant(Wordadjselect::Right)
494    }
495    #[doc = "Data is left adjusted in word"]
496    #[inline(always)]
497    pub fn left(self) -> &'a mut crate::W<REG> {
498        self.variant(Wordadjselect::Left)
499    }
500}
501#[doc = "Data Formatting Bit Extension\n\nValue on reset: 0"]
502#[derive(Clone, Copy, Debug, PartialEq, Eq)]
503#[repr(u8)]
504pub enum Extendselect {
505    #[doc = "0: Extend with zeroes"]
506    Zero = 0,
507    #[doc = "1: Extend with ones"]
508    One = 1,
509    #[doc = "2: Extend with Most Significant Bit"]
510    Msbit = 2,
511    #[doc = "3: Extend with Least Significant Bit"]
512    Lsbit = 3,
513}
514impl From<Extendselect> for u8 {
515    #[inline(always)]
516    fn from(variant: Extendselect) -> Self {
517        variant as _
518    }
519}
520impl crate::FieldSpec for Extendselect {
521    type Ux = u8;
522}
523impl crate::IsEnum for Extendselect {}
524#[doc = "Field `EXTEND` reader - Data Formatting Bit Extension"]
525pub type ExtendR = crate::FieldReader<Extendselect>;
526impl ExtendR {
527    #[doc = "Get enumerated values variant"]
528    #[inline(always)]
529    pub const fn variant(&self) -> Extendselect {
530        match self.bits {
531            0 => Extendselect::Zero,
532            1 => Extendselect::One,
533            2 => Extendselect::Msbit,
534            3 => Extendselect::Lsbit,
535            _ => unreachable!(),
536        }
537    }
538    #[doc = "Extend with zeroes"]
539    #[inline(always)]
540    pub fn is_zero(&self) -> bool {
541        *self == Extendselect::Zero
542    }
543    #[doc = "Extend with ones"]
544    #[inline(always)]
545    pub fn is_one(&self) -> bool {
546        *self == Extendselect::One
547    }
548    #[doc = "Extend with Most Significant Bit"]
549    #[inline(always)]
550    pub fn is_msbit(&self) -> bool {
551        *self == Extendselect::Msbit
552    }
553    #[doc = "Extend with Least Significant Bit"]
554    #[inline(always)]
555    pub fn is_lsbit(&self) -> bool {
556        *self == Extendselect::Lsbit
557    }
558}
559#[doc = "Field `EXTEND` writer - Data Formatting Bit Extension"]
560pub type ExtendW<'a, REG> = crate::FieldWriter<'a, REG, 2, Extendselect, crate::Safe>;
561impl<'a, REG> ExtendW<'a, REG>
562where
563    REG: crate::Writable + crate::RegisterSpec,
564    REG::Ux: From<u8>,
565{
566    #[doc = "Extend with zeroes"]
567    #[inline(always)]
568    pub fn zero(self) -> &'a mut crate::W<REG> {
569        self.variant(Extendselect::Zero)
570    }
571    #[doc = "Extend with ones"]
572    #[inline(always)]
573    pub fn one(self) -> &'a mut crate::W<REG> {
574        self.variant(Extendselect::One)
575    }
576    #[doc = "Extend with Most Significant Bit"]
577    #[inline(always)]
578    pub fn msbit(self) -> &'a mut crate::W<REG> {
579        self.variant(Extendselect::Msbit)
580    }
581    #[doc = "Extend with Least Significant Bit"]
582    #[inline(always)]
583    pub fn lsbit(self) -> &'a mut crate::W<REG> {
584        self.variant(Extendselect::Lsbit)
585    }
586}
587#[doc = "Data Formatting Bit Reverse\n\nValue on reset: 0"]
588#[derive(Clone, Copy, Debug, PartialEq, Eq)]
589pub enum Bitrevselect {
590    #[doc = "0: Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
591    Msbit = 0,
592    #[doc = "1: Transfer Data Least Significant Bit (LSB) first"]
593    Lsbit = 1,
594}
595impl From<Bitrevselect> for bool {
596    #[inline(always)]
597    fn from(variant: Bitrevselect) -> Self {
598        variant as u8 != 0
599    }
600}
601#[doc = "Field `BITREV` reader - Data Formatting Bit Reverse"]
602pub type BitrevR = crate::BitReader<Bitrevselect>;
603impl BitrevR {
604    #[doc = "Get enumerated values variant"]
605    #[inline(always)]
606    pub const fn variant(&self) -> Bitrevselect {
607        match self.bits {
608            false => Bitrevselect::Msbit,
609            true => Bitrevselect::Lsbit,
610        }
611    }
612    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
613    #[inline(always)]
614    pub fn is_msbit(&self) -> bool {
615        *self == Bitrevselect::Msbit
616    }
617    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
618    #[inline(always)]
619    pub fn is_lsbit(&self) -> bool {
620        *self == Bitrevselect::Lsbit
621    }
622}
623#[doc = "Field `BITREV` writer - Data Formatting Bit Reverse"]
624pub type BitrevW<'a, REG> = crate::BitWriter<'a, REG, Bitrevselect>;
625impl<'a, REG> BitrevW<'a, REG>
626where
627    REG: crate::Writable + crate::RegisterSpec,
628{
629    #[doc = "Transfer Data Most Significant Bit (MSB) first (default for I2S protocol)"]
630    #[inline(always)]
631    pub fn msbit(self) -> &'a mut crate::W<REG> {
632        self.variant(Bitrevselect::Msbit)
633    }
634    #[doc = "Transfer Data Least Significant Bit (LSB) first"]
635    #[inline(always)]
636    pub fn lsbit(self) -> &'a mut crate::W<REG> {
637        self.variant(Bitrevselect::Lsbit)
638    }
639}
640#[doc = "Field `SLOTDIS0` reader - Slot 0 Disabled for this Serializer"]
641pub type Slotdis0R = crate::BitReader;
642#[doc = "Field `SLOTDIS0` writer - Slot 0 Disabled for this Serializer"]
643pub type Slotdis0W<'a, REG> = crate::BitWriter<'a, REG>;
644#[doc = "Field `SLOTDIS1` reader - Slot 1 Disabled for this Serializer"]
645pub type Slotdis1R = crate::BitReader;
646#[doc = "Field `SLOTDIS1` writer - Slot 1 Disabled for this Serializer"]
647pub type Slotdis1W<'a, REG> = crate::BitWriter<'a, REG>;
648#[doc = "Field `SLOTDIS2` reader - Slot 2 Disabled for this Serializer"]
649pub type Slotdis2R = crate::BitReader;
650#[doc = "Field `SLOTDIS2` writer - Slot 2 Disabled for this Serializer"]
651pub type Slotdis2W<'a, REG> = crate::BitWriter<'a, REG>;
652#[doc = "Field `SLOTDIS3` reader - Slot 3 Disabled for this Serializer"]
653pub type Slotdis3R = crate::BitReader;
654#[doc = "Field `SLOTDIS3` writer - Slot 3 Disabled for this Serializer"]
655pub type Slotdis3W<'a, REG> = crate::BitWriter<'a, REG>;
656#[doc = "Field `SLOTDIS4` reader - Slot 4 Disabled for this Serializer"]
657pub type Slotdis4R = crate::BitReader;
658#[doc = "Field `SLOTDIS4` writer - Slot 4 Disabled for this Serializer"]
659pub type Slotdis4W<'a, REG> = crate::BitWriter<'a, REG>;
660#[doc = "Field `SLOTDIS5` reader - Slot 5 Disabled for this Serializer"]
661pub type Slotdis5R = crate::BitReader;
662#[doc = "Field `SLOTDIS5` writer - Slot 5 Disabled for this Serializer"]
663pub type Slotdis5W<'a, REG> = crate::BitWriter<'a, REG>;
664#[doc = "Field `SLOTDIS6` reader - Slot 6 Disabled for this Serializer"]
665pub type Slotdis6R = crate::BitReader;
666#[doc = "Field `SLOTDIS6` writer - Slot 6 Disabled for this Serializer"]
667pub type Slotdis6W<'a, REG> = crate::BitWriter<'a, REG>;
668#[doc = "Field `SLOTDIS7` reader - Slot 7 Disabled for this Serializer"]
669pub type Slotdis7R = crate::BitReader;
670#[doc = "Field `SLOTDIS7` writer - Slot 7 Disabled for this Serializer"]
671pub type Slotdis7W<'a, REG> = crate::BitWriter<'a, REG>;
672#[doc = "Mono Mode\n\nValue on reset: 0"]
673#[derive(Clone, Copy, Debug, PartialEq, Eq)]
674pub enum Monoselect {
675    #[doc = "0: Normal mode"]
676    Stereo = 0,
677    #[doc = "1: Left channel data is duplicated to right channel"]
678    Mono = 1,
679}
680impl From<Monoselect> for bool {
681    #[inline(always)]
682    fn from(variant: Monoselect) -> Self {
683        variant as u8 != 0
684    }
685}
686#[doc = "Field `MONO` reader - Mono Mode"]
687pub type MonoR = crate::BitReader<Monoselect>;
688impl MonoR {
689    #[doc = "Get enumerated values variant"]
690    #[inline(always)]
691    pub const fn variant(&self) -> Monoselect {
692        match self.bits {
693            false => Monoselect::Stereo,
694            true => Monoselect::Mono,
695        }
696    }
697    #[doc = "Normal mode"]
698    #[inline(always)]
699    pub fn is_stereo(&self) -> bool {
700        *self == Monoselect::Stereo
701    }
702    #[doc = "Left channel data is duplicated to right channel"]
703    #[inline(always)]
704    pub fn is_mono(&self) -> bool {
705        *self == Monoselect::Mono
706    }
707}
708#[doc = "Field `MONO` writer - Mono Mode"]
709pub type MonoW<'a, REG> = crate::BitWriter<'a, REG, Monoselect>;
710impl<'a, REG> MonoW<'a, REG>
711where
712    REG: crate::Writable + crate::RegisterSpec,
713{
714    #[doc = "Normal mode"]
715    #[inline(always)]
716    pub fn stereo(self) -> &'a mut crate::W<REG> {
717        self.variant(Monoselect::Stereo)
718    }
719    #[doc = "Left channel data is duplicated to right channel"]
720    #[inline(always)]
721    pub fn mono(self) -> &'a mut crate::W<REG> {
722        self.variant(Monoselect::Mono)
723    }
724}
725#[doc = "Single or Multiple DMA Channels\n\nValue on reset: 0"]
726#[derive(Clone, Copy, Debug, PartialEq, Eq)]
727pub enum Dmaselect {
728    #[doc = "0: Single DMA channel"]
729    Single = 0,
730    #[doc = "1: One DMA channel per data channel"]
731    Multiple = 1,
732}
733impl From<Dmaselect> for bool {
734    #[inline(always)]
735    fn from(variant: Dmaselect) -> Self {
736        variant as u8 != 0
737    }
738}
739#[doc = "Field `DMA` reader - Single or Multiple DMA Channels"]
740pub type DmaR = crate::BitReader<Dmaselect>;
741impl DmaR {
742    #[doc = "Get enumerated values variant"]
743    #[inline(always)]
744    pub const fn variant(&self) -> Dmaselect {
745        match self.bits {
746            false => Dmaselect::Single,
747            true => Dmaselect::Multiple,
748        }
749    }
750    #[doc = "Single DMA channel"]
751    #[inline(always)]
752    pub fn is_single(&self) -> bool {
753        *self == Dmaselect::Single
754    }
755    #[doc = "One DMA channel per data channel"]
756    #[inline(always)]
757    pub fn is_multiple(&self) -> bool {
758        *self == Dmaselect::Multiple
759    }
760}
761#[doc = "Field `DMA` writer - Single or Multiple DMA Channels"]
762pub type DmaW<'a, REG> = crate::BitWriter<'a, REG, Dmaselect>;
763impl<'a, REG> DmaW<'a, REG>
764where
765    REG: crate::Writable + crate::RegisterSpec,
766{
767    #[doc = "Single DMA channel"]
768    #[inline(always)]
769    pub fn single(self) -> &'a mut crate::W<REG> {
770        self.variant(Dmaselect::Single)
771    }
772    #[doc = "One DMA channel per data channel"]
773    #[inline(always)]
774    pub fn multiple(self) -> &'a mut crate::W<REG> {
775        self.variant(Dmaselect::Multiple)
776    }
777}
778#[doc = "Field `RXLOOP` reader - Loop-back Test Mode"]
779pub type RxloopR = crate::BitReader;
780#[doc = "Field `RXLOOP` writer - Loop-back Test Mode"]
781pub type RxloopW<'a, REG> = crate::BitWriter<'a, REG>;
782impl R {
783    #[doc = "Bits 0:1 - Serializer Mode"]
784    #[inline(always)]
785    pub fn sermode(&self) -> SermodeR {
786        SermodeR::new((self.bits & 3) as u8)
787    }
788    #[doc = "Bits 2:3 - Line Default Line when Slot Disabled"]
789    #[inline(always)]
790    pub fn txdefault(&self) -> TxdefaultR {
791        TxdefaultR::new(((self.bits >> 2) & 3) as u8)
792    }
793    #[doc = "Bit 4 - Transmit Data when Underrun"]
794    #[inline(always)]
795    pub fn txsame(&self) -> TxsameR {
796        TxsameR::new(((self.bits >> 4) & 1) != 0)
797    }
798    #[doc = "Bit 5 - Clock Unit Selection"]
799    #[inline(always)]
800    pub fn clksel(&self) -> ClkselR {
801        ClkselR::new(((self.bits >> 5) & 1) != 0)
802    }
803    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
804    #[inline(always)]
805    pub fn slotadj(&self) -> SlotadjR {
806        SlotadjR::new(((self.bits >> 7) & 1) != 0)
807    }
808    #[doc = "Bits 8:10 - Data Word Size"]
809    #[inline(always)]
810    pub fn datasize(&self) -> DatasizeR {
811        DatasizeR::new(((self.bits >> 8) & 7) as u8)
812    }
813    #[doc = "Bit 12 - Data Word Formatting Adjust"]
814    #[inline(always)]
815    pub fn wordadj(&self) -> WordadjR {
816        WordadjR::new(((self.bits >> 12) & 1) != 0)
817    }
818    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
819    #[inline(always)]
820    pub fn extend(&self) -> ExtendR {
821        ExtendR::new(((self.bits >> 13) & 3) as u8)
822    }
823    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
824    #[inline(always)]
825    pub fn bitrev(&self) -> BitrevR {
826        BitrevR::new(((self.bits >> 15) & 1) != 0)
827    }
828    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
829    #[inline(always)]
830    pub fn slotdis0(&self) -> Slotdis0R {
831        Slotdis0R::new(((self.bits >> 16) & 1) != 0)
832    }
833    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
834    #[inline(always)]
835    pub fn slotdis1(&self) -> Slotdis1R {
836        Slotdis1R::new(((self.bits >> 17) & 1) != 0)
837    }
838    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
839    #[inline(always)]
840    pub fn slotdis2(&self) -> Slotdis2R {
841        Slotdis2R::new(((self.bits >> 18) & 1) != 0)
842    }
843    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
844    #[inline(always)]
845    pub fn slotdis3(&self) -> Slotdis3R {
846        Slotdis3R::new(((self.bits >> 19) & 1) != 0)
847    }
848    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
849    #[inline(always)]
850    pub fn slotdis4(&self) -> Slotdis4R {
851        Slotdis4R::new(((self.bits >> 20) & 1) != 0)
852    }
853    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
854    #[inline(always)]
855    pub fn slotdis5(&self) -> Slotdis5R {
856        Slotdis5R::new(((self.bits >> 21) & 1) != 0)
857    }
858    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
859    #[inline(always)]
860    pub fn slotdis6(&self) -> Slotdis6R {
861        Slotdis6R::new(((self.bits >> 22) & 1) != 0)
862    }
863    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
864    #[inline(always)]
865    pub fn slotdis7(&self) -> Slotdis7R {
866        Slotdis7R::new(((self.bits >> 23) & 1) != 0)
867    }
868    #[doc = "Bit 24 - Mono Mode"]
869    #[inline(always)]
870    pub fn mono(&self) -> MonoR {
871        MonoR::new(((self.bits >> 24) & 1) != 0)
872    }
873    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
874    #[inline(always)]
875    pub fn dma(&self) -> DmaR {
876        DmaR::new(((self.bits >> 25) & 1) != 0)
877    }
878    #[doc = "Bit 26 - Loop-back Test Mode"]
879    #[inline(always)]
880    pub fn rxloop(&self) -> RxloopR {
881        RxloopR::new(((self.bits >> 26) & 1) != 0)
882    }
883}
884impl W {
885    #[doc = "Bits 0:1 - Serializer Mode"]
886    #[inline(always)]
887    #[must_use]
888    pub fn sermode(&mut self) -> SermodeW<SerctrlSpec> {
889        SermodeW::new(self, 0)
890    }
891    #[doc = "Bits 2:3 - Line Default Line when Slot Disabled"]
892    #[inline(always)]
893    #[must_use]
894    pub fn txdefault(&mut self) -> TxdefaultW<SerctrlSpec> {
895        TxdefaultW::new(self, 2)
896    }
897    #[doc = "Bit 4 - Transmit Data when Underrun"]
898    #[inline(always)]
899    #[must_use]
900    pub fn txsame(&mut self) -> TxsameW<SerctrlSpec> {
901        TxsameW::new(self, 4)
902    }
903    #[doc = "Bit 5 - Clock Unit Selection"]
904    #[inline(always)]
905    #[must_use]
906    pub fn clksel(&mut self) -> ClkselW<SerctrlSpec> {
907        ClkselW::new(self, 5)
908    }
909    #[doc = "Bit 7 - Data Slot Formatting Adjust"]
910    #[inline(always)]
911    #[must_use]
912    pub fn slotadj(&mut self) -> SlotadjW<SerctrlSpec> {
913        SlotadjW::new(self, 7)
914    }
915    #[doc = "Bits 8:10 - Data Word Size"]
916    #[inline(always)]
917    #[must_use]
918    pub fn datasize(&mut self) -> DatasizeW<SerctrlSpec> {
919        DatasizeW::new(self, 8)
920    }
921    #[doc = "Bit 12 - Data Word Formatting Adjust"]
922    #[inline(always)]
923    #[must_use]
924    pub fn wordadj(&mut self) -> WordadjW<SerctrlSpec> {
925        WordadjW::new(self, 12)
926    }
927    #[doc = "Bits 13:14 - Data Formatting Bit Extension"]
928    #[inline(always)]
929    #[must_use]
930    pub fn extend(&mut self) -> ExtendW<SerctrlSpec> {
931        ExtendW::new(self, 13)
932    }
933    #[doc = "Bit 15 - Data Formatting Bit Reverse"]
934    #[inline(always)]
935    #[must_use]
936    pub fn bitrev(&mut self) -> BitrevW<SerctrlSpec> {
937        BitrevW::new(self, 15)
938    }
939    #[doc = "Bit 16 - Slot 0 Disabled for this Serializer"]
940    #[inline(always)]
941    #[must_use]
942    pub fn slotdis0(&mut self) -> Slotdis0W<SerctrlSpec> {
943        Slotdis0W::new(self, 16)
944    }
945    #[doc = "Bit 17 - Slot 1 Disabled for this Serializer"]
946    #[inline(always)]
947    #[must_use]
948    pub fn slotdis1(&mut self) -> Slotdis1W<SerctrlSpec> {
949        Slotdis1W::new(self, 17)
950    }
951    #[doc = "Bit 18 - Slot 2 Disabled for this Serializer"]
952    #[inline(always)]
953    #[must_use]
954    pub fn slotdis2(&mut self) -> Slotdis2W<SerctrlSpec> {
955        Slotdis2W::new(self, 18)
956    }
957    #[doc = "Bit 19 - Slot 3 Disabled for this Serializer"]
958    #[inline(always)]
959    #[must_use]
960    pub fn slotdis3(&mut self) -> Slotdis3W<SerctrlSpec> {
961        Slotdis3W::new(self, 19)
962    }
963    #[doc = "Bit 20 - Slot 4 Disabled for this Serializer"]
964    #[inline(always)]
965    #[must_use]
966    pub fn slotdis4(&mut self) -> Slotdis4W<SerctrlSpec> {
967        Slotdis4W::new(self, 20)
968    }
969    #[doc = "Bit 21 - Slot 5 Disabled for this Serializer"]
970    #[inline(always)]
971    #[must_use]
972    pub fn slotdis5(&mut self) -> Slotdis5W<SerctrlSpec> {
973        Slotdis5W::new(self, 21)
974    }
975    #[doc = "Bit 22 - Slot 6 Disabled for this Serializer"]
976    #[inline(always)]
977    #[must_use]
978    pub fn slotdis6(&mut self) -> Slotdis6W<SerctrlSpec> {
979        Slotdis6W::new(self, 22)
980    }
981    #[doc = "Bit 23 - Slot 7 Disabled for this Serializer"]
982    #[inline(always)]
983    #[must_use]
984    pub fn slotdis7(&mut self) -> Slotdis7W<SerctrlSpec> {
985        Slotdis7W::new(self, 23)
986    }
987    #[doc = "Bit 24 - Mono Mode"]
988    #[inline(always)]
989    #[must_use]
990    pub fn mono(&mut self) -> MonoW<SerctrlSpec> {
991        MonoW::new(self, 24)
992    }
993    #[doc = "Bit 25 - Single or Multiple DMA Channels"]
994    #[inline(always)]
995    #[must_use]
996    pub fn dma(&mut self) -> DmaW<SerctrlSpec> {
997        DmaW::new(self, 25)
998    }
999    #[doc = "Bit 26 - Loop-back Test Mode"]
1000    #[inline(always)]
1001    #[must_use]
1002    pub fn rxloop(&mut self) -> RxloopW<SerctrlSpec> {
1003        RxloopW::new(self, 26)
1004    }
1005}
1006#[doc = "Serializer n Control\n\nYou can [`read`](crate::Reg::read) this register and get [`serctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`serctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1007pub struct SerctrlSpec;
1008impl crate::RegisterSpec for SerctrlSpec {
1009    type Ux = u32;
1010}
1011#[doc = "`read()` method returns [`serctrl::R`](R) reader structure"]
1012impl crate::Readable for SerctrlSpec {}
1013#[doc = "`write(|w| ..)` method takes [`serctrl::W`](W) writer structure"]
1014impl crate::Writable for SerctrlSpec {
1015    type Safety = crate::Unsafe;
1016    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1017    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
1018}
1019#[doc = "`reset()` method sets SERCTRL%s to value 0"]
1020impl crate::Resettable for SerctrlSpec {
1021    const RESET_VALUE: u32 = 0;
1022}
atsamd21j/i2s/serctrl.rs

atsamd21j/i2s/
serctrl.rs
