atsamd21j/tcc0/
evctrl.rs

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1#[doc = "Register `EVCTRL` reader"]
2pub type R = crate::R<EvctrlSpec>;
3#[doc = "Register `EVCTRL` writer"]
4pub type W = crate::W<EvctrlSpec>;
5#[doc = "Timer/counter Input Event0 Action\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Evact0select {
9    #[doc = "0: Event action disabled"]
10    Off = 0,
11    #[doc = "1: Start, restart or re-trigger counter on event"]
12    Retrigger = 1,
13    #[doc = "2: Count on event"]
14    Countev = 2,
15    #[doc = "3: Start counter on event"]
16    Start = 3,
17    #[doc = "4: Increment counter on event"]
18    Inc = 4,
19    #[doc = "5: Count on active state of asynchronous event"]
20    Count = 5,
21    #[doc = "7: Non-recoverable fault"]
22    Fault = 7,
23}
24impl From<Evact0select> for u8 {
25    #[inline(always)]
26    fn from(variant: Evact0select) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for Evact0select {
31    type Ux = u8;
32}
33impl crate::IsEnum for Evact0select {}
34#[doc = "Field `EVACT0` reader - Timer/counter Input Event0 Action"]
35pub type Evact0R = crate::FieldReader<Evact0select>;
36impl Evact0R {
37    #[doc = "Get enumerated values variant"]
38    #[inline(always)]
39    pub const fn variant(&self) -> Option<Evact0select> {
40        match self.bits {
41            0 => Some(Evact0select::Off),
42            1 => Some(Evact0select::Retrigger),
43            2 => Some(Evact0select::Countev),
44            3 => Some(Evact0select::Start),
45            4 => Some(Evact0select::Inc),
46            5 => Some(Evact0select::Count),
47            7 => Some(Evact0select::Fault),
48            _ => None,
49        }
50    }
51    #[doc = "Event action disabled"]
52    #[inline(always)]
53    pub fn is_off(&self) -> bool {
54        *self == Evact0select::Off
55    }
56    #[doc = "Start, restart or re-trigger counter on event"]
57    #[inline(always)]
58    pub fn is_retrigger(&self) -> bool {
59        *self == Evact0select::Retrigger
60    }
61    #[doc = "Count on event"]
62    #[inline(always)]
63    pub fn is_countev(&self) -> bool {
64        *self == Evact0select::Countev
65    }
66    #[doc = "Start counter on event"]
67    #[inline(always)]
68    pub fn is_start(&self) -> bool {
69        *self == Evact0select::Start
70    }
71    #[doc = "Increment counter on event"]
72    #[inline(always)]
73    pub fn is_inc(&self) -> bool {
74        *self == Evact0select::Inc
75    }
76    #[doc = "Count on active state of asynchronous event"]
77    #[inline(always)]
78    pub fn is_count(&self) -> bool {
79        *self == Evact0select::Count
80    }
81    #[doc = "Non-recoverable fault"]
82    #[inline(always)]
83    pub fn is_fault(&self) -> bool {
84        *self == Evact0select::Fault
85    }
86}
87#[doc = "Field `EVACT0` writer - Timer/counter Input Event0 Action"]
88pub type Evact0W<'a, REG> = crate::FieldWriter<'a, REG, 3, Evact0select>;
89impl<'a, REG> Evact0W<'a, REG>
90where
91    REG: crate::Writable + crate::RegisterSpec,
92    REG::Ux: From<u8>,
93{
94    #[doc = "Event action disabled"]
95    #[inline(always)]
96    pub fn off(self) -> &'a mut crate::W<REG> {
97        self.variant(Evact0select::Off)
98    }
99    #[doc = "Start, restart or re-trigger counter on event"]
100    #[inline(always)]
101    pub fn retrigger(self) -> &'a mut crate::W<REG> {
102        self.variant(Evact0select::Retrigger)
103    }
104    #[doc = "Count on event"]
105    #[inline(always)]
106    pub fn countev(self) -> &'a mut crate::W<REG> {
107        self.variant(Evact0select::Countev)
108    }
109    #[doc = "Start counter on event"]
110    #[inline(always)]
111    pub fn start(self) -> &'a mut crate::W<REG> {
112        self.variant(Evact0select::Start)
113    }
114    #[doc = "Increment counter on event"]
115    #[inline(always)]
116    pub fn inc(self) -> &'a mut crate::W<REG> {
117        self.variant(Evact0select::Inc)
118    }
119    #[doc = "Count on active state of asynchronous event"]
120    #[inline(always)]
121    pub fn count(self) -> &'a mut crate::W<REG> {
122        self.variant(Evact0select::Count)
123    }
124    #[doc = "Non-recoverable fault"]
125    #[inline(always)]
126    pub fn fault(self) -> &'a mut crate::W<REG> {
127        self.variant(Evact0select::Fault)
128    }
129}
130#[doc = "Timer/counter Input Event1 Action\n\nValue on reset: 0"]
131#[derive(Clone, Copy, Debug, PartialEq, Eq)]
132#[repr(u8)]
133pub enum Evact1select {
134    #[doc = "0: Event action disabled"]
135    Off = 0,
136    #[doc = "1: Re-trigger counter on event"]
137    Retrigger = 1,
138    #[doc = "2: Direction control"]
139    Dir = 2,
140    #[doc = "3: Stop counter on event"]
141    Stop = 3,
142    #[doc = "4: Decrement counter on event"]
143    Dec = 4,
144    #[doc = "5: Period capture value in CC0 register, pulse width capture value in CC1 register"]
145    Ppw = 5,
146    #[doc = "6: Period capture value in CC1 register, pulse width capture value in CC0 register"]
147    Pwp = 6,
148    #[doc = "7: Non-recoverable fault"]
149    Fault = 7,
150}
151impl From<Evact1select> for u8 {
152    #[inline(always)]
153    fn from(variant: Evact1select) -> Self {
154        variant as _
155    }
156}
157impl crate::FieldSpec for Evact1select {
158    type Ux = u8;
159}
160impl crate::IsEnum for Evact1select {}
161#[doc = "Field `EVACT1` reader - Timer/counter Input Event1 Action"]
162pub type Evact1R = crate::FieldReader<Evact1select>;
163impl Evact1R {
164    #[doc = "Get enumerated values variant"]
165    #[inline(always)]
166    pub const fn variant(&self) -> Evact1select {
167        match self.bits {
168            0 => Evact1select::Off,
169            1 => Evact1select::Retrigger,
170            2 => Evact1select::Dir,
171            3 => Evact1select::Stop,
172            4 => Evact1select::Dec,
173            5 => Evact1select::Ppw,
174            6 => Evact1select::Pwp,
175            7 => Evact1select::Fault,
176            _ => unreachable!(),
177        }
178    }
179    #[doc = "Event action disabled"]
180    #[inline(always)]
181    pub fn is_off(&self) -> bool {
182        *self == Evact1select::Off
183    }
184    #[doc = "Re-trigger counter on event"]
185    #[inline(always)]
186    pub fn is_retrigger(&self) -> bool {
187        *self == Evact1select::Retrigger
188    }
189    #[doc = "Direction control"]
190    #[inline(always)]
191    pub fn is_dir(&self) -> bool {
192        *self == Evact1select::Dir
193    }
194    #[doc = "Stop counter on event"]
195    #[inline(always)]
196    pub fn is_stop(&self) -> bool {
197        *self == Evact1select::Stop
198    }
199    #[doc = "Decrement counter on event"]
200    #[inline(always)]
201    pub fn is_dec(&self) -> bool {
202        *self == Evact1select::Dec
203    }
204    #[doc = "Period capture value in CC0 register, pulse width capture value in CC1 register"]
205    #[inline(always)]
206    pub fn is_ppw(&self) -> bool {
207        *self == Evact1select::Ppw
208    }
209    #[doc = "Period capture value in CC1 register, pulse width capture value in CC0 register"]
210    #[inline(always)]
211    pub fn is_pwp(&self) -> bool {
212        *self == Evact1select::Pwp
213    }
214    #[doc = "Non-recoverable fault"]
215    #[inline(always)]
216    pub fn is_fault(&self) -> bool {
217        *self == Evact1select::Fault
218    }
219}
220#[doc = "Field `EVACT1` writer - Timer/counter Input Event1 Action"]
221pub type Evact1W<'a, REG> = crate::FieldWriter<'a, REG, 3, Evact1select, crate::Safe>;
222impl<'a, REG> Evact1W<'a, REG>
223where
224    REG: crate::Writable + crate::RegisterSpec,
225    REG::Ux: From<u8>,
226{
227    #[doc = "Event action disabled"]
228    #[inline(always)]
229    pub fn off(self) -> &'a mut crate::W<REG> {
230        self.variant(Evact1select::Off)
231    }
232    #[doc = "Re-trigger counter on event"]
233    #[inline(always)]
234    pub fn retrigger(self) -> &'a mut crate::W<REG> {
235        self.variant(Evact1select::Retrigger)
236    }
237    #[doc = "Direction control"]
238    #[inline(always)]
239    pub fn dir(self) -> &'a mut crate::W<REG> {
240        self.variant(Evact1select::Dir)
241    }
242    #[doc = "Stop counter on event"]
243    #[inline(always)]
244    pub fn stop(self) -> &'a mut crate::W<REG> {
245        self.variant(Evact1select::Stop)
246    }
247    #[doc = "Decrement counter on event"]
248    #[inline(always)]
249    pub fn dec(self) -> &'a mut crate::W<REG> {
250        self.variant(Evact1select::Dec)
251    }
252    #[doc = "Period capture value in CC0 register, pulse width capture value in CC1 register"]
253    #[inline(always)]
254    pub fn ppw(self) -> &'a mut crate::W<REG> {
255        self.variant(Evact1select::Ppw)
256    }
257    #[doc = "Period capture value in CC1 register, pulse width capture value in CC0 register"]
258    #[inline(always)]
259    pub fn pwp(self) -> &'a mut crate::W<REG> {
260        self.variant(Evact1select::Pwp)
261    }
262    #[doc = "Non-recoverable fault"]
263    #[inline(always)]
264    pub fn fault(self) -> &'a mut crate::W<REG> {
265        self.variant(Evact1select::Fault)
266    }
267}
268#[doc = "Timer/counter Output Event Mode\n\nValue on reset: 0"]
269#[derive(Clone, Copy, Debug, PartialEq, Eq)]
270#[repr(u8)]
271pub enum Cntselselect {
272    #[doc = "0: An interrupt/event is generated when a new counter cycle starts"]
273    Start = 0,
274    #[doc = "1: An interrupt/event is generated when a counter cycle ends"]
275    End = 1,
276    #[doc = "2: An interrupt/event is generated when a counter cycle ends, except for the first and last cycles"]
277    Between = 2,
278    #[doc = "3: An interrupt/event is generated when a new counter cycle starts or a counter cycle ends"]
279    Boundary = 3,
280}
281impl From<Cntselselect> for u8 {
282    #[inline(always)]
283    fn from(variant: Cntselselect) -> Self {
284        variant as _
285    }
286}
287impl crate::FieldSpec for Cntselselect {
288    type Ux = u8;
289}
290impl crate::IsEnum for Cntselselect {}
291#[doc = "Field `CNTSEL` reader - Timer/counter Output Event Mode"]
292pub type CntselR = crate::FieldReader<Cntselselect>;
293impl CntselR {
294    #[doc = "Get enumerated values variant"]
295    #[inline(always)]
296    pub const fn variant(&self) -> Cntselselect {
297        match self.bits {
298            0 => Cntselselect::Start,
299            1 => Cntselselect::End,
300            2 => Cntselselect::Between,
301            3 => Cntselselect::Boundary,
302            _ => unreachable!(),
303        }
304    }
305    #[doc = "An interrupt/event is generated when a new counter cycle starts"]
306    #[inline(always)]
307    pub fn is_start(&self) -> bool {
308        *self == Cntselselect::Start
309    }
310    #[doc = "An interrupt/event is generated when a counter cycle ends"]
311    #[inline(always)]
312    pub fn is_end(&self) -> bool {
313        *self == Cntselselect::End
314    }
315    #[doc = "An interrupt/event is generated when a counter cycle ends, except for the first and last cycles"]
316    #[inline(always)]
317    pub fn is_between(&self) -> bool {
318        *self == Cntselselect::Between
319    }
320    #[doc = "An interrupt/event is generated when a new counter cycle starts or a counter cycle ends"]
321    #[inline(always)]
322    pub fn is_boundary(&self) -> bool {
323        *self == Cntselselect::Boundary
324    }
325}
326#[doc = "Field `CNTSEL` writer - Timer/counter Output Event Mode"]
327pub type CntselW<'a, REG> = crate::FieldWriter<'a, REG, 2, Cntselselect, crate::Safe>;
328impl<'a, REG> CntselW<'a, REG>
329where
330    REG: crate::Writable + crate::RegisterSpec,
331    REG::Ux: From<u8>,
332{
333    #[doc = "An interrupt/event is generated when a new counter cycle starts"]
334    #[inline(always)]
335    pub fn start(self) -> &'a mut crate::W<REG> {
336        self.variant(Cntselselect::Start)
337    }
338    #[doc = "An interrupt/event is generated when a counter cycle ends"]
339    #[inline(always)]
340    pub fn end(self) -> &'a mut crate::W<REG> {
341        self.variant(Cntselselect::End)
342    }
343    #[doc = "An interrupt/event is generated when a counter cycle ends, except for the first and last cycles"]
344    #[inline(always)]
345    pub fn between(self) -> &'a mut crate::W<REG> {
346        self.variant(Cntselselect::Between)
347    }
348    #[doc = "An interrupt/event is generated when a new counter cycle starts or a counter cycle ends"]
349    #[inline(always)]
350    pub fn boundary(self) -> &'a mut crate::W<REG> {
351        self.variant(Cntselselect::Boundary)
352    }
353}
354#[doc = "Field `OVFEO` reader - Overflow/Underflow Output Event Enable"]
355pub type OvfeoR = crate::BitReader;
356#[doc = "Field `OVFEO` writer - Overflow/Underflow Output Event Enable"]
357pub type OvfeoW<'a, REG> = crate::BitWriter<'a, REG>;
358#[doc = "Field `TRGEO` reader - Retrigger Output Event Enable"]
359pub type TrgeoR = crate::BitReader;
360#[doc = "Field `TRGEO` writer - Retrigger Output Event Enable"]
361pub type TrgeoW<'a, REG> = crate::BitWriter<'a, REG>;
362#[doc = "Field `CNTEO` reader - Timer/counter Output Event Enable"]
363pub type CnteoR = crate::BitReader;
364#[doc = "Field `CNTEO` writer - Timer/counter Output Event Enable"]
365pub type CnteoW<'a, REG> = crate::BitWriter<'a, REG>;
366#[doc = "Field `TCINV0` reader - Inverted Event 0 Input Enable"]
367pub type Tcinv0R = crate::BitReader;
368#[doc = "Field `TCINV0` writer - Inverted Event 0 Input Enable"]
369pub type Tcinv0W<'a, REG> = crate::BitWriter<'a, REG>;
370#[doc = "Field `TCINV1` reader - Inverted Event 1 Input Enable"]
371pub type Tcinv1R = crate::BitReader;
372#[doc = "Field `TCINV1` writer - Inverted Event 1 Input Enable"]
373pub type Tcinv1W<'a, REG> = crate::BitWriter<'a, REG>;
374#[doc = "Field `TCEI0` reader - Timer/counter Event 0 Input Enable"]
375pub type Tcei0R = crate::BitReader;
376#[doc = "Field `TCEI0` writer - Timer/counter Event 0 Input Enable"]
377pub type Tcei0W<'a, REG> = crate::BitWriter<'a, REG>;
378#[doc = "Field `TCEI1` reader - Timer/counter Event 1 Input Enable"]
379pub type Tcei1R = crate::BitReader;
380#[doc = "Field `TCEI1` writer - Timer/counter Event 1 Input Enable"]
381pub type Tcei1W<'a, REG> = crate::BitWriter<'a, REG>;
382#[doc = "Field `MCEI0` reader - Match or Capture Channel 0 Event Input Enable"]
383pub type Mcei0R = crate::BitReader;
384#[doc = "Field `MCEI0` writer - Match or Capture Channel 0 Event Input Enable"]
385pub type Mcei0W<'a, REG> = crate::BitWriter<'a, REG>;
386#[doc = "Field `MCEI1` reader - Match or Capture Channel 1 Event Input Enable"]
387pub type Mcei1R = crate::BitReader;
388#[doc = "Field `MCEI1` writer - Match or Capture Channel 1 Event Input Enable"]
389pub type Mcei1W<'a, REG> = crate::BitWriter<'a, REG>;
390#[doc = "Field `MCEI2` reader - Match or Capture Channel 2 Event Input Enable"]
391pub type Mcei2R = crate::BitReader;
392#[doc = "Field `MCEI2` writer - Match or Capture Channel 2 Event Input Enable"]
393pub type Mcei2W<'a, REG> = crate::BitWriter<'a, REG>;
394#[doc = "Field `MCEI3` reader - Match or Capture Channel 3 Event Input Enable"]
395pub type Mcei3R = crate::BitReader;
396#[doc = "Field `MCEI3` writer - Match or Capture Channel 3 Event Input Enable"]
397pub type Mcei3W<'a, REG> = crate::BitWriter<'a, REG>;
398#[doc = "Field `MCEO0` reader - Match or Capture Channel 0 Event Output Enable"]
399pub type Mceo0R = crate::BitReader;
400#[doc = "Field `MCEO0` writer - Match or Capture Channel 0 Event Output Enable"]
401pub type Mceo0W<'a, REG> = crate::BitWriter<'a, REG>;
402#[doc = "Field `MCEO1` reader - Match or Capture Channel 1 Event Output Enable"]
403pub type Mceo1R = crate::BitReader;
404#[doc = "Field `MCEO1` writer - Match or Capture Channel 1 Event Output Enable"]
405pub type Mceo1W<'a, REG> = crate::BitWriter<'a, REG>;
406#[doc = "Field `MCEO2` reader - Match or Capture Channel 2 Event Output Enable"]
407pub type Mceo2R = crate::BitReader;
408#[doc = "Field `MCEO2` writer - Match or Capture Channel 2 Event Output Enable"]
409pub type Mceo2W<'a, REG> = crate::BitWriter<'a, REG>;
410#[doc = "Field `MCEO3` reader - Match or Capture Channel 3 Event Output Enable"]
411pub type Mceo3R = crate::BitReader;
412#[doc = "Field `MCEO3` writer - Match or Capture Channel 3 Event Output Enable"]
413pub type Mceo3W<'a, REG> = crate::BitWriter<'a, REG>;
414impl R {
415    #[doc = "Bits 0:2 - Timer/counter Input Event0 Action"]
416    #[inline(always)]
417    pub fn evact0(&self) -> Evact0R {
418        Evact0R::new((self.bits & 7) as u8)
419    }
420    #[doc = "Bits 3:5 - Timer/counter Input Event1 Action"]
421    #[inline(always)]
422    pub fn evact1(&self) -> Evact1R {
423        Evact1R::new(((self.bits >> 3) & 7) as u8)
424    }
425    #[doc = "Bits 6:7 - Timer/counter Output Event Mode"]
426    #[inline(always)]
427    pub fn cntsel(&self) -> CntselR {
428        CntselR::new(((self.bits >> 6) & 3) as u8)
429    }
430    #[doc = "Bit 8 - Overflow/Underflow Output Event Enable"]
431    #[inline(always)]
432    pub fn ovfeo(&self) -> OvfeoR {
433        OvfeoR::new(((self.bits >> 8) & 1) != 0)
434    }
435    #[doc = "Bit 9 - Retrigger Output Event Enable"]
436    #[inline(always)]
437    pub fn trgeo(&self) -> TrgeoR {
438        TrgeoR::new(((self.bits >> 9) & 1) != 0)
439    }
440    #[doc = "Bit 10 - Timer/counter Output Event Enable"]
441    #[inline(always)]
442    pub fn cnteo(&self) -> CnteoR {
443        CnteoR::new(((self.bits >> 10) & 1) != 0)
444    }
445    #[doc = "Bit 12 - Inverted Event 0 Input Enable"]
446    #[inline(always)]
447    pub fn tcinv0(&self) -> Tcinv0R {
448        Tcinv0R::new(((self.bits >> 12) & 1) != 0)
449    }
450    #[doc = "Bit 13 - Inverted Event 1 Input Enable"]
451    #[inline(always)]
452    pub fn tcinv1(&self) -> Tcinv1R {
453        Tcinv1R::new(((self.bits >> 13) & 1) != 0)
454    }
455    #[doc = "Bit 14 - Timer/counter Event 0 Input Enable"]
456    #[inline(always)]
457    pub fn tcei0(&self) -> Tcei0R {
458        Tcei0R::new(((self.bits >> 14) & 1) != 0)
459    }
460    #[doc = "Bit 15 - Timer/counter Event 1 Input Enable"]
461    #[inline(always)]
462    pub fn tcei1(&self) -> Tcei1R {
463        Tcei1R::new(((self.bits >> 15) & 1) != 0)
464    }
465    #[doc = "Bit 16 - Match or Capture Channel 0 Event Input Enable"]
466    #[inline(always)]
467    pub fn mcei0(&self) -> Mcei0R {
468        Mcei0R::new(((self.bits >> 16) & 1) != 0)
469    }
470    #[doc = "Bit 17 - Match or Capture Channel 1 Event Input Enable"]
471    #[inline(always)]
472    pub fn mcei1(&self) -> Mcei1R {
473        Mcei1R::new(((self.bits >> 17) & 1) != 0)
474    }
475    #[doc = "Bit 18 - Match or Capture Channel 2 Event Input Enable"]
476    #[inline(always)]
477    pub fn mcei2(&self) -> Mcei2R {
478        Mcei2R::new(((self.bits >> 18) & 1) != 0)
479    }
480    #[doc = "Bit 19 - Match or Capture Channel 3 Event Input Enable"]
481    #[inline(always)]
482    pub fn mcei3(&self) -> Mcei3R {
483        Mcei3R::new(((self.bits >> 19) & 1) != 0)
484    }
485    #[doc = "Bit 24 - Match or Capture Channel 0 Event Output Enable"]
486    #[inline(always)]
487    pub fn mceo0(&self) -> Mceo0R {
488        Mceo0R::new(((self.bits >> 24) & 1) != 0)
489    }
490    #[doc = "Bit 25 - Match or Capture Channel 1 Event Output Enable"]
491    #[inline(always)]
492    pub fn mceo1(&self) -> Mceo1R {
493        Mceo1R::new(((self.bits >> 25) & 1) != 0)
494    }
495    #[doc = "Bit 26 - Match or Capture Channel 2 Event Output Enable"]
496    #[inline(always)]
497    pub fn mceo2(&self) -> Mceo2R {
498        Mceo2R::new(((self.bits >> 26) & 1) != 0)
499    }
500    #[doc = "Bit 27 - Match or Capture Channel 3 Event Output Enable"]
501    #[inline(always)]
502    pub fn mceo3(&self) -> Mceo3R {
503        Mceo3R::new(((self.bits >> 27) & 1) != 0)
504    }
505}
506impl W {
507    #[doc = "Bits 0:2 - Timer/counter Input Event0 Action"]
508    #[inline(always)]
509    #[must_use]
510    pub fn evact0(&mut self) -> Evact0W<EvctrlSpec> {
511        Evact0W::new(self, 0)
512    }
513    #[doc = "Bits 3:5 - Timer/counter Input Event1 Action"]
514    #[inline(always)]
515    #[must_use]
516    pub fn evact1(&mut self) -> Evact1W<EvctrlSpec> {
517        Evact1W::new(self, 3)
518    }
519    #[doc = "Bits 6:7 - Timer/counter Output Event Mode"]
520    #[inline(always)]
521    #[must_use]
522    pub fn cntsel(&mut self) -> CntselW<EvctrlSpec> {
523        CntselW::new(self, 6)
524    }
525    #[doc = "Bit 8 - Overflow/Underflow Output Event Enable"]
526    #[inline(always)]
527    #[must_use]
528    pub fn ovfeo(&mut self) -> OvfeoW<EvctrlSpec> {
529        OvfeoW::new(self, 8)
530    }
531    #[doc = "Bit 9 - Retrigger Output Event Enable"]
532    #[inline(always)]
533    #[must_use]
534    pub fn trgeo(&mut self) -> TrgeoW<EvctrlSpec> {
535        TrgeoW::new(self, 9)
536    }
537    #[doc = "Bit 10 - Timer/counter Output Event Enable"]
538    #[inline(always)]
539    #[must_use]
540    pub fn cnteo(&mut self) -> CnteoW<EvctrlSpec> {
541        CnteoW::new(self, 10)
542    }
543    #[doc = "Bit 12 - Inverted Event 0 Input Enable"]
544    #[inline(always)]
545    #[must_use]
546    pub fn tcinv0(&mut self) -> Tcinv0W<EvctrlSpec> {
547        Tcinv0W::new(self, 12)
548    }
549    #[doc = "Bit 13 - Inverted Event 1 Input Enable"]
550    #[inline(always)]
551    #[must_use]
552    pub fn tcinv1(&mut self) -> Tcinv1W<EvctrlSpec> {
553        Tcinv1W::new(self, 13)
554    }
555    #[doc = "Bit 14 - Timer/counter Event 0 Input Enable"]
556    #[inline(always)]
557    #[must_use]
558    pub fn tcei0(&mut self) -> Tcei0W<EvctrlSpec> {
559        Tcei0W::new(self, 14)
560    }
561    #[doc = "Bit 15 - Timer/counter Event 1 Input Enable"]
562    #[inline(always)]
563    #[must_use]
564    pub fn tcei1(&mut self) -> Tcei1W<EvctrlSpec> {
565        Tcei1W::new(self, 15)
566    }
567    #[doc = "Bit 16 - Match or Capture Channel 0 Event Input Enable"]
568    #[inline(always)]
569    #[must_use]
570    pub fn mcei0(&mut self) -> Mcei0W<EvctrlSpec> {
571        Mcei0W::new(self, 16)
572    }
573    #[doc = "Bit 17 - Match or Capture Channel 1 Event Input Enable"]
574    #[inline(always)]
575    #[must_use]
576    pub fn mcei1(&mut self) -> Mcei1W<EvctrlSpec> {
577        Mcei1W::new(self, 17)
578    }
579    #[doc = "Bit 18 - Match or Capture Channel 2 Event Input Enable"]
580    #[inline(always)]
581    #[must_use]
582    pub fn mcei2(&mut self) -> Mcei2W<EvctrlSpec> {
583        Mcei2W::new(self, 18)
584    }
585    #[doc = "Bit 19 - Match or Capture Channel 3 Event Input Enable"]
586    #[inline(always)]
587    #[must_use]
588    pub fn mcei3(&mut self) -> Mcei3W<EvctrlSpec> {
589        Mcei3W::new(self, 19)
590    }
591    #[doc = "Bit 24 - Match or Capture Channel 0 Event Output Enable"]
592    #[inline(always)]
593    #[must_use]
594    pub fn mceo0(&mut self) -> Mceo0W<EvctrlSpec> {
595        Mceo0W::new(self, 24)
596    }
597    #[doc = "Bit 25 - Match or Capture Channel 1 Event Output Enable"]
598    #[inline(always)]
599    #[must_use]
600    pub fn mceo1(&mut self) -> Mceo1W<EvctrlSpec> {
601        Mceo1W::new(self, 25)
602    }
603    #[doc = "Bit 26 - Match or Capture Channel 2 Event Output Enable"]
604    #[inline(always)]
605    #[must_use]
606    pub fn mceo2(&mut self) -> Mceo2W<EvctrlSpec> {
607        Mceo2W::new(self, 26)
608    }
609    #[doc = "Bit 27 - Match or Capture Channel 3 Event Output Enable"]
610    #[inline(always)]
611    #[must_use]
612    pub fn mceo3(&mut self) -> Mceo3W<EvctrlSpec> {
613        Mceo3W::new(self, 27)
614    }
615}
616#[doc = "Event Control\n\nYou can [`read`](crate::Reg::read) this register and get [`evctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`evctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
617pub struct EvctrlSpec;
618impl crate::RegisterSpec for EvctrlSpec {
619    type Ux = u32;
620}
621#[doc = "`read()` method returns [`evctrl::R`](R) reader structure"]
622impl crate::Readable for EvctrlSpec {}
623#[doc = "`write(|w| ..)` method takes [`evctrl::W`](W) writer structure"]
624impl crate::Writable for EvctrlSpec {
625    type Safety = crate::Unsafe;
626    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
627    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
628}
629#[doc = "`reset()` method sets EVCTRL to value 0"]
630impl crate::Resettable for EvctrlSpec {
631    const RESET_VALUE: u32 = 0;
632}
atsamd21j/tcc0/evctrl.rs

atsamd21j/tcc0/
evctrl.rs
