atsamd21j/port/
outclr.rs

Help
1#[doc = "Register `OUTCLR%s` reader"]
2pub type R = crate::R<OutclrSpec>;
3#[doc = "Register `OUTCLR%s` writer"]
4pub type W = crate::W<OutclrSpec>;
5#[doc = "Field `OUTCLR` reader - Port Data Output Value Clear"]
6pub type OutclrR = crate::FieldReader<u32>;
7#[doc = "Field `OUTCLR` writer - Port Data Output Value Clear"]
8pub type OutclrW<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - Port Data Output Value Clear"]
11    #[inline(always)]
12    pub fn outclr(&self) -> OutclrR {
13        OutclrR::new(self.bits)
14    }
15}
16impl W {
17    #[doc = "Bits 0:31 - Port Data Output Value Clear"]
18    #[inline(always)]
19    #[must_use]
20    pub fn outclr(&mut self) -> OutclrW<OutclrSpec> {
21        OutclrW::new(self, 0)
22    }
23}
24#[doc = "Data Output Value Clear\n\nYou can [`read`](crate::Reg::read) this register and get [`outclr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`outclr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
25pub struct OutclrSpec;
26impl crate::RegisterSpec for OutclrSpec {
27    type Ux = u32;
28}
29#[doc = "`read()` method returns [`outclr::R`](R) reader structure"]
30impl crate::Readable for OutclrSpec {}
31#[doc = "`write(|w| ..)` method takes [`outclr::W`](W) writer structure"]
32impl crate::Writable for OutclrSpec {
33    type Safety = crate::Unsafe;
34    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
35    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
36}
37#[doc = "`reset()` method sets OUTCLR%s to value 0"]
38impl crate::Resettable for OutclrSpec {
39    const RESET_VALUE: u32 = 0;
40}
atsamd21j/port/outclr.rs

atsamd21j/port/
outclr.rs
