atsamd21j/dmac/
crcctrl.rs
1#[doc = "Register `CRCCTRL` reader"]
2pub type R = crate::R<CrcctrlSpec>;
3#[doc = "Register `CRCCTRL` writer"]
4pub type W = crate::W<CrcctrlSpec>;
5#[doc = "CRC Beat Size\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq, Eq)]
7#[repr(u8)]
8pub enum Crcbeatsizeselect {
9 #[doc = "0: 8-bit bus transfer"]
10 Byte = 0,
11 #[doc = "1: 16-bit bus transfer"]
12 Hword = 1,
13 #[doc = "2: 32-bit bus transfer"]
14 Word = 2,
15}
16impl From<Crcbeatsizeselect> for u8 {
17 #[inline(always)]
18 fn from(variant: Crcbeatsizeselect) -> Self {
19 variant as _
20 }
21}
22impl crate::FieldSpec for Crcbeatsizeselect {
23 type Ux = u8;
24}
25impl crate::IsEnum for Crcbeatsizeselect {}
26#[doc = "Field `CRCBEATSIZE` reader - CRC Beat Size"]
27pub type CrcbeatsizeR = crate::FieldReader<Crcbeatsizeselect>;
28impl CrcbeatsizeR {
29 #[doc = "Get enumerated values variant"]
30 #[inline(always)]
31 pub const fn variant(&self) -> Option<Crcbeatsizeselect> {
32 match self.bits {
33 0 => Some(Crcbeatsizeselect::Byte),
34 1 => Some(Crcbeatsizeselect::Hword),
35 2 => Some(Crcbeatsizeselect::Word),
36 _ => None,
37 }
38 }
39 #[doc = "8-bit bus transfer"]
40 #[inline(always)]
41 pub fn is_byte(&self) -> bool {
42 *self == Crcbeatsizeselect::Byte
43 }
44 #[doc = "16-bit bus transfer"]
45 #[inline(always)]
46 pub fn is_hword(&self) -> bool {
47 *self == Crcbeatsizeselect::Hword
48 }
49 #[doc = "32-bit bus transfer"]
50 #[inline(always)]
51 pub fn is_word(&self) -> bool {
52 *self == Crcbeatsizeselect::Word
53 }
54}
55#[doc = "Field `CRCBEATSIZE` writer - CRC Beat Size"]
56pub type CrcbeatsizeW<'a, REG> = crate::FieldWriter<'a, REG, 2, Crcbeatsizeselect>;
57impl<'a, REG> CrcbeatsizeW<'a, REG>
58where
59 REG: crate::Writable + crate::RegisterSpec,
60 REG::Ux: From<u8>,
61{
62 #[doc = "8-bit bus transfer"]
63 #[inline(always)]
64 pub fn byte(self) -> &'a mut crate::W<REG> {
65 self.variant(Crcbeatsizeselect::Byte)
66 }
67 #[doc = "16-bit bus transfer"]
68 #[inline(always)]
69 pub fn hword(self) -> &'a mut crate::W<REG> {
70 self.variant(Crcbeatsizeselect::Hword)
71 }
72 #[doc = "32-bit bus transfer"]
73 #[inline(always)]
74 pub fn word(self) -> &'a mut crate::W<REG> {
75 self.variant(Crcbeatsizeselect::Word)
76 }
77}
78#[doc = "CRC Polynomial Type\n\nValue on reset: 0"]
79#[derive(Clone, Copy, Debug, PartialEq, Eq)]
80#[repr(u8)]
81pub enum Crcpolyselect {
82 #[doc = "0: CRC-16 (CRC-CCITT)"]
83 Crc16 = 0,
84 #[doc = "1: CRC32 (IEEE 802.3)"]
85 Crc32 = 1,
86}
87impl From<Crcpolyselect> for u8 {
88 #[inline(always)]
89 fn from(variant: Crcpolyselect) -> Self {
90 variant as _
91 }
92}
93impl crate::FieldSpec for Crcpolyselect {
94 type Ux = u8;
95}
96impl crate::IsEnum for Crcpolyselect {}
97#[doc = "Field `CRCPOLY` reader - CRC Polynomial Type"]
98pub type CrcpolyR = crate::FieldReader<Crcpolyselect>;
99impl CrcpolyR {
100 #[doc = "Get enumerated values variant"]
101 #[inline(always)]
102 pub const fn variant(&self) -> Option<Crcpolyselect> {
103 match self.bits {
104 0 => Some(Crcpolyselect::Crc16),
105 1 => Some(Crcpolyselect::Crc32),
106 _ => None,
107 }
108 }
109 #[doc = "CRC-16 (CRC-CCITT)"]
110 #[inline(always)]
111 pub fn is_crc16(&self) -> bool {
112 *self == Crcpolyselect::Crc16
113 }
114 #[doc = "CRC32 (IEEE 802.3)"]
115 #[inline(always)]
116 pub fn is_crc32(&self) -> bool {
117 *self == Crcpolyselect::Crc32
118 }
119}
120#[doc = "Field `CRCPOLY` writer - CRC Polynomial Type"]
121pub type CrcpolyW<'a, REG> = crate::FieldWriter<'a, REG, 2, Crcpolyselect>;
122impl<'a, REG> CrcpolyW<'a, REG>
123where
124 REG: crate::Writable + crate::RegisterSpec,
125 REG::Ux: From<u8>,
126{
127 #[doc = "CRC-16 (CRC-CCITT)"]
128 #[inline(always)]
129 pub fn crc16(self) -> &'a mut crate::W<REG> {
130 self.variant(Crcpolyselect::Crc16)
131 }
132 #[doc = "CRC32 (IEEE 802.3)"]
133 #[inline(always)]
134 pub fn crc32(self) -> &'a mut crate::W<REG> {
135 self.variant(Crcpolyselect::Crc32)
136 }
137}
138#[doc = "CRC Input Source\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq, Eq)]
140#[repr(u8)]
141pub enum Crcsrcselect {
142 #[doc = "0: No action"]
143 Noact = 0,
144 #[doc = "1: I/O interface"]
145 Io = 1,
146}
147impl From<Crcsrcselect> for u8 {
148 #[inline(always)]
149 fn from(variant: Crcsrcselect) -> Self {
150 variant as _
151 }
152}
153impl crate::FieldSpec for Crcsrcselect {
154 type Ux = u8;
155}
156impl crate::IsEnum for Crcsrcselect {}
157#[doc = "Field `CRCSRC` reader - CRC Input Source"]
158pub type CrcsrcR = crate::FieldReader<Crcsrcselect>;
159impl CrcsrcR {
160 #[doc = "Get enumerated values variant"]
161 #[inline(always)]
162 pub const fn variant(&self) -> Option<Crcsrcselect> {
163 match self.bits {
164 0 => Some(Crcsrcselect::Noact),
165 1 => Some(Crcsrcselect::Io),
166 _ => None,
167 }
168 }
169 #[doc = "No action"]
170 #[inline(always)]
171 pub fn is_noact(&self) -> bool {
172 *self == Crcsrcselect::Noact
173 }
174 #[doc = "I/O interface"]
175 #[inline(always)]
176 pub fn is_io(&self) -> bool {
177 *self == Crcsrcselect::Io
178 }
179}
180#[doc = "Field `CRCSRC` writer - CRC Input Source"]
181pub type CrcsrcW<'a, REG> = crate::FieldWriter<'a, REG, 6, Crcsrcselect>;
182impl<'a, REG> CrcsrcW<'a, REG>
183where
184 REG: crate::Writable + crate::RegisterSpec,
185 REG::Ux: From<u8>,
186{
187 #[doc = "No action"]
188 #[inline(always)]
189 pub fn noact(self) -> &'a mut crate::W<REG> {
190 self.variant(Crcsrcselect::Noact)
191 }
192 #[doc = "I/O interface"]
193 #[inline(always)]
194 pub fn io(self) -> &'a mut crate::W<REG> {
195 self.variant(Crcsrcselect::Io)
196 }
197}
198impl R {
199 #[doc = "Bits 0:1 - CRC Beat Size"]
200 #[inline(always)]
201 pub fn crcbeatsize(&self) -> CrcbeatsizeR {
202 CrcbeatsizeR::new((self.bits & 3) as u8)
203 }
204 #[doc = "Bits 2:3 - CRC Polynomial Type"]
205 #[inline(always)]
206 pub fn crcpoly(&self) -> CrcpolyR {
207 CrcpolyR::new(((self.bits >> 2) & 3) as u8)
208 }
209 #[doc = "Bits 8:13 - CRC Input Source"]
210 #[inline(always)]
211 pub fn crcsrc(&self) -> CrcsrcR {
212 CrcsrcR::new(((self.bits >> 8) & 0x3f) as u8)
213 }
214}
215impl W {
216 #[doc = "Bits 0:1 - CRC Beat Size"]
217 #[inline(always)]
218 #[must_use]
219 pub fn crcbeatsize(&mut self) -> CrcbeatsizeW<CrcctrlSpec> {
220 CrcbeatsizeW::new(self, 0)
221 }
222 #[doc = "Bits 2:3 - CRC Polynomial Type"]
223 #[inline(always)]
224 #[must_use]
225 pub fn crcpoly(&mut self) -> CrcpolyW<CrcctrlSpec> {
226 CrcpolyW::new(self, 2)
227 }
228 #[doc = "Bits 8:13 - CRC Input Source"]
229 #[inline(always)]
230 #[must_use]
231 pub fn crcsrc(&mut self) -> CrcsrcW<CrcctrlSpec> {
232 CrcsrcW::new(self, 8)
233 }
234}
235#[doc = "CRC Control\n\nYou can [`read`](crate::Reg::read) this register and get [`crcctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`crcctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
236pub struct CrcctrlSpec;
237impl crate::RegisterSpec for CrcctrlSpec {
238 type Ux = u16;
239}
240#[doc = "`read()` method returns [`crcctrl::R`](R) reader structure"]
241impl crate::Readable for CrcctrlSpec {}
242#[doc = "`write(|w| ..)` method takes [`crcctrl::W`](W) writer structure"]
243impl crate::Writable for CrcctrlSpec {
244 type Safety = crate::Unsafe;
245 const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
246 const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
247}
248#[doc = "`reset()` method sets CRCCTRL to value 0"]
249impl crate::Resettable for CrcctrlSpec {
250 const RESET_VALUE: u16 = 0;
251}