atsamd11d/sysctrl/
pclksr.rs

1#[doc = "Register `PCLKSR` reader"]
2pub type R = crate::R<PclksrSpec>;
3#[doc = "Field `XOSCRDY` reader - XOSC Ready"]
4pub type XoscrdyR = crate::BitReader;
5#[doc = "Field `XOSC32KRDY` reader - XOSC32K Ready"]
6pub type Xosc32krdyR = crate::BitReader;
7#[doc = "Field `OSC32KRDY` reader - OSC32K Ready"]
8pub type Osc32krdyR = crate::BitReader;
9#[doc = "Field `OSC8MRDY` reader - OSC8M Ready"]
10pub type Osc8mrdyR = crate::BitReader;
11#[doc = "Field `DFLLRDY` reader - DFLL Ready"]
12pub type DfllrdyR = crate::BitReader;
13#[doc = "Field `DFLLOOB` reader - DFLL Out Of Bounds"]
14pub type DflloobR = crate::BitReader;
15#[doc = "Field `DFLLLCKF` reader - DFLL Lock Fine"]
16pub type DflllckfR = crate::BitReader;
17#[doc = "Field `DFLLLCKC` reader - DFLL Lock Coarse"]
18pub type DflllckcR = crate::BitReader;
19#[doc = "Field `DFLLRCS` reader - DFLL Reference Clock Stopped"]
20pub type DfllrcsR = crate::BitReader;
21#[doc = "Field `BOD33RDY` reader - BOD33 Ready"]
22pub type Bod33rdyR = crate::BitReader;
23#[doc = "Field `BOD33DET` reader - BOD33 Detection"]
24pub type Bod33detR = crate::BitReader;
25#[doc = "Field `B33SRDY` reader - BOD33 Synchronization Ready"]
26pub type B33srdyR = crate::BitReader;
27#[doc = "Field `DPLLLCKR` reader - DPLL Lock Rise"]
28pub type DplllckrR = crate::BitReader;
29#[doc = "Field `DPLLLCKF` reader - DPLL Lock Fall"]
30pub type DplllckfR = crate::BitReader;
31#[doc = "Field `DPLLLTO` reader - DPLL Lock Timeout"]
32pub type DpllltoR = crate::BitReader;
33impl R {
34    #[doc = "Bit 0 - XOSC Ready"]
35    #[inline(always)]
36    pub fn xoscrdy(&self) -> XoscrdyR {
37        XoscrdyR::new((self.bits & 1) != 0)
38    }
39    #[doc = "Bit 1 - XOSC32K Ready"]
40    #[inline(always)]
41    pub fn xosc32krdy(&self) -> Xosc32krdyR {
42        Xosc32krdyR::new(((self.bits >> 1) & 1) != 0)
43    }
44    #[doc = "Bit 2 - OSC32K Ready"]
45    #[inline(always)]
46    pub fn osc32krdy(&self) -> Osc32krdyR {
47        Osc32krdyR::new(((self.bits >> 2) & 1) != 0)
48    }
49    #[doc = "Bit 3 - OSC8M Ready"]
50    #[inline(always)]
51    pub fn osc8mrdy(&self) -> Osc8mrdyR {
52        Osc8mrdyR::new(((self.bits >> 3) & 1) != 0)
53    }
54    #[doc = "Bit 4 - DFLL Ready"]
55    #[inline(always)]
56    pub fn dfllrdy(&self) -> DfllrdyR {
57        DfllrdyR::new(((self.bits >> 4) & 1) != 0)
58    }
59    #[doc = "Bit 5 - DFLL Out Of Bounds"]
60    #[inline(always)]
61    pub fn dflloob(&self) -> DflloobR {
62        DflloobR::new(((self.bits >> 5) & 1) != 0)
63    }
64    #[doc = "Bit 6 - DFLL Lock Fine"]
65    #[inline(always)]
66    pub fn dflllckf(&self) -> DflllckfR {
67        DflllckfR::new(((self.bits >> 6) & 1) != 0)
68    }
69    #[doc = "Bit 7 - DFLL Lock Coarse"]
70    #[inline(always)]
71    pub fn dflllckc(&self) -> DflllckcR {
72        DflllckcR::new(((self.bits >> 7) & 1) != 0)
73    }
74    #[doc = "Bit 8 - DFLL Reference Clock Stopped"]
75    #[inline(always)]
76    pub fn dfllrcs(&self) -> DfllrcsR {
77        DfllrcsR::new(((self.bits >> 8) & 1) != 0)
78    }
79    #[doc = "Bit 9 - BOD33 Ready"]
80    #[inline(always)]
81    pub fn bod33rdy(&self) -> Bod33rdyR {
82        Bod33rdyR::new(((self.bits >> 9) & 1) != 0)
83    }
84    #[doc = "Bit 10 - BOD33 Detection"]
85    #[inline(always)]
86    pub fn bod33det(&self) -> Bod33detR {
87        Bod33detR::new(((self.bits >> 10) & 1) != 0)
88    }
89    #[doc = "Bit 11 - BOD33 Synchronization Ready"]
90    #[inline(always)]
91    pub fn b33srdy(&self) -> B33srdyR {
92        B33srdyR::new(((self.bits >> 11) & 1) != 0)
93    }
94    #[doc = "Bit 15 - DPLL Lock Rise"]
95    #[inline(always)]
96    pub fn dplllckr(&self) -> DplllckrR {
97        DplllckrR::new(((self.bits >> 15) & 1) != 0)
98    }
99    #[doc = "Bit 16 - DPLL Lock Fall"]
100    #[inline(always)]
101    pub fn dplllckf(&self) -> DplllckfR {
102        DplllckfR::new(((self.bits >> 16) & 1) != 0)
103    }
104    #[doc = "Bit 17 - DPLL Lock Timeout"]
105    #[inline(always)]
106    pub fn dplllto(&self) -> DpllltoR {
107        DpllltoR::new(((self.bits >> 17) & 1) != 0)
108    }
109}
110#[doc = "Power and Clocks Status\n\nYou can [`read`](crate::Reg::read) this register and get [`pclksr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
111pub struct PclksrSpec;
112impl crate::RegisterSpec for PclksrSpec {
113    type Ux = u32;
114}
115#[doc = "`read()` method returns [`pclksr::R`](R) reader structure"]
116impl crate::Readable for PclksrSpec {}
117#[doc = "`reset()` method sets PCLKSR to value 0"]
118impl crate::Resettable for PclksrSpec {
119    const RESET_VALUE: u32 = 0;
120}