atsamd11d/rtc/mode0/
intenset.rs

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1#[doc = "Register `INTENSET` reader"]
2pub type R = crate::R<IntensetSpec>;
3#[doc = "Register `INTENSET` writer"]
4pub type W = crate::W<IntensetSpec>;
5#[doc = "Field `CMP0` reader - Compare 0 Interrupt Enable"]
6pub type Cmp0R = crate::BitReader;
7#[doc = "Field `CMP0` writer - Compare 0 Interrupt Enable"]
8pub type Cmp0W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SYNCRDY` reader - Synchronization Ready Interrupt Enable"]
10pub type SyncrdyR = crate::BitReader;
11#[doc = "Field `SYNCRDY` writer - Synchronization Ready Interrupt Enable"]
12pub type SyncrdyW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OVF` reader - Overflow Interrupt Enable"]
14pub type OvfR = crate::BitReader;
15#[doc = "Field `OVF` writer - Overflow Interrupt Enable"]
16pub type OvfW<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - Compare 0 Interrupt Enable"]
19    #[inline(always)]
20    pub fn cmp0(&self) -> Cmp0R {
21        Cmp0R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 6 - Synchronization Ready Interrupt Enable"]
24    #[inline(always)]
25    pub fn syncrdy(&self) -> SyncrdyR {
26        SyncrdyR::new(((self.bits >> 6) & 1) != 0)
27    }
28    #[doc = "Bit 7 - Overflow Interrupt Enable"]
29    #[inline(always)]
30    pub fn ovf(&self) -> OvfR {
31        OvfR::new(((self.bits >> 7) & 1) != 0)
32    }
33}
34impl W {
35    #[doc = "Bit 0 - Compare 0 Interrupt Enable"]
36    #[inline(always)]
37    #[must_use]
38    pub fn cmp0(&mut self) -> Cmp0W<IntensetSpec> {
39        Cmp0W::new(self, 0)
40    }
41    #[doc = "Bit 6 - Synchronization Ready Interrupt Enable"]
42    #[inline(always)]
43    #[must_use]
44    pub fn syncrdy(&mut self) -> SyncrdyW<IntensetSpec> {
45        SyncrdyW::new(self, 6)
46    }
47    #[doc = "Bit 7 - Overflow Interrupt Enable"]
48    #[inline(always)]
49    #[must_use]
50    pub fn ovf(&mut self) -> OvfW<IntensetSpec> {
51        OvfW::new(self, 7)
52    }
53}
54#[doc = "MODE0 Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct IntensetSpec;
56impl crate::RegisterSpec for IntensetSpec {
57    type Ux = u8;
58}
59#[doc = "`read()` method returns [`intenset::R`](R) reader structure"]
60impl crate::Readable for IntensetSpec {}
61#[doc = "`write(|w| ..)` method takes [`intenset::W`](W) writer structure"]
62impl crate::Writable for IntensetSpec {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u8 = 0;
66}
67#[doc = "`reset()` method sets INTENSET to value 0"]
68impl crate::Resettable for IntensetSpec {
69    const RESET_VALUE: u8 = 0;
70}
atsamd11d/rtc/mode0/intenset.rs

atsamd11d/rtc/mode0/
intenset.rs
