atsamd11d/sysctrl/
dfllctrl.rs

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1#[doc = "Register `DFLLCTRL` reader"]
2pub type R = crate::R<DfllctrlSpec>;
3#[doc = "Register `DFLLCTRL` writer"]
4pub type W = crate::W<DfllctrlSpec>;
5#[doc = "Field `ENABLE` reader - DFLL Enable"]
6pub type EnableR = crate::BitReader;
7#[doc = "Field `ENABLE` writer - DFLL Enable"]
8pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `MODE` reader - Operating Mode Selection"]
10pub type ModeR = crate::BitReader;
11#[doc = "Field `MODE` writer - Operating Mode Selection"]
12pub type ModeW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `STABLE` reader - Stable DFLL Frequency"]
14pub type StableR = crate::BitReader;
15#[doc = "Field `STABLE` writer - Stable DFLL Frequency"]
16pub type StableW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `LLAW` reader - Lose Lock After Wake"]
18pub type LlawR = crate::BitReader;
19#[doc = "Field `LLAW` writer - Lose Lock After Wake"]
20pub type LlawW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `USBCRM` reader - USB Clock Recovery Mode"]
22pub type UsbcrmR = crate::BitReader;
23#[doc = "Field `USBCRM` writer - USB Clock Recovery Mode"]
24pub type UsbcrmW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `RUNSTDBY` reader - Run in Standby"]
26pub type RunstdbyR = crate::BitReader;
27#[doc = "Field `RUNSTDBY` writer - Run in Standby"]
28pub type RunstdbyW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ONDEMAND` reader - On Demand Control"]
30pub type OndemandR = crate::BitReader;
31#[doc = "Field `ONDEMAND` writer - On Demand Control"]
32pub type OndemandW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `CCDIS` reader - Chill Cycle Disable"]
34pub type CcdisR = crate::BitReader;
35#[doc = "Field `CCDIS` writer - Chill Cycle Disable"]
36pub type CcdisW<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `QLDIS` reader - Quick Lock Disable"]
38pub type QldisR = crate::BitReader;
39#[doc = "Field `QLDIS` writer - Quick Lock Disable"]
40pub type QldisW<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `BPLCKC` reader - Bypass Coarse Lock"]
42pub type BplckcR = crate::BitReader;
43#[doc = "Field `BPLCKC` writer - Bypass Coarse Lock"]
44pub type BplckcW<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `WAITLOCK` reader - Wait Lock"]
46pub type WaitlockR = crate::BitReader;
47#[doc = "Field `WAITLOCK` writer - Wait Lock"]
48pub type WaitlockW<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50    #[doc = "Bit 1 - DFLL Enable"]
51    #[inline(always)]
52    pub fn enable(&self) -> EnableR {
53        EnableR::new(((self.bits >> 1) & 1) != 0)
54    }
55    #[doc = "Bit 2 - Operating Mode Selection"]
56    #[inline(always)]
57    pub fn mode(&self) -> ModeR {
58        ModeR::new(((self.bits >> 2) & 1) != 0)
59    }
60    #[doc = "Bit 3 - Stable DFLL Frequency"]
61    #[inline(always)]
62    pub fn stable(&self) -> StableR {
63        StableR::new(((self.bits >> 3) & 1) != 0)
64    }
65    #[doc = "Bit 4 - Lose Lock After Wake"]
66    #[inline(always)]
67    pub fn llaw(&self) -> LlawR {
68        LlawR::new(((self.bits >> 4) & 1) != 0)
69    }
70    #[doc = "Bit 5 - USB Clock Recovery Mode"]
71    #[inline(always)]
72    pub fn usbcrm(&self) -> UsbcrmR {
73        UsbcrmR::new(((self.bits >> 5) & 1) != 0)
74    }
75    #[doc = "Bit 6 - Run in Standby"]
76    #[inline(always)]
77    pub fn runstdby(&self) -> RunstdbyR {
78        RunstdbyR::new(((self.bits >> 6) & 1) != 0)
79    }
80    #[doc = "Bit 7 - On Demand Control"]
81    #[inline(always)]
82    pub fn ondemand(&self) -> OndemandR {
83        OndemandR::new(((self.bits >> 7) & 1) != 0)
84    }
85    #[doc = "Bit 8 - Chill Cycle Disable"]
86    #[inline(always)]
87    pub fn ccdis(&self) -> CcdisR {
88        CcdisR::new(((self.bits >> 8) & 1) != 0)
89    }
90    #[doc = "Bit 9 - Quick Lock Disable"]
91    #[inline(always)]
92    pub fn qldis(&self) -> QldisR {
93        QldisR::new(((self.bits >> 9) & 1) != 0)
94    }
95    #[doc = "Bit 10 - Bypass Coarse Lock"]
96    #[inline(always)]
97    pub fn bplckc(&self) -> BplckcR {
98        BplckcR::new(((self.bits >> 10) & 1) != 0)
99    }
100    #[doc = "Bit 11 - Wait Lock"]
101    #[inline(always)]
102    pub fn waitlock(&self) -> WaitlockR {
103        WaitlockR::new(((self.bits >> 11) & 1) != 0)
104    }
105}
106impl W {
107    #[doc = "Bit 1 - DFLL Enable"]
108    #[inline(always)]
109    #[must_use]
110    pub fn enable(&mut self) -> EnableW<DfllctrlSpec> {
111        EnableW::new(self, 1)
112    }
113    #[doc = "Bit 2 - Operating Mode Selection"]
114    #[inline(always)]
115    #[must_use]
116    pub fn mode(&mut self) -> ModeW<DfllctrlSpec> {
117        ModeW::new(self, 2)
118    }
119    #[doc = "Bit 3 - Stable DFLL Frequency"]
120    #[inline(always)]
121    #[must_use]
122    pub fn stable(&mut self) -> StableW<DfllctrlSpec> {
123        StableW::new(self, 3)
124    }
125    #[doc = "Bit 4 - Lose Lock After Wake"]
126    #[inline(always)]
127    #[must_use]
128    pub fn llaw(&mut self) -> LlawW<DfllctrlSpec> {
129        LlawW::new(self, 4)
130    }
131    #[doc = "Bit 5 - USB Clock Recovery Mode"]
132    #[inline(always)]
133    #[must_use]
134    pub fn usbcrm(&mut self) -> UsbcrmW<DfllctrlSpec> {
135        UsbcrmW::new(self, 5)
136    }
137    #[doc = "Bit 6 - Run in Standby"]
138    #[inline(always)]
139    #[must_use]
140    pub fn runstdby(&mut self) -> RunstdbyW<DfllctrlSpec> {
141        RunstdbyW::new(self, 6)
142    }
143    #[doc = "Bit 7 - On Demand Control"]
144    #[inline(always)]
145    #[must_use]
146    pub fn ondemand(&mut self) -> OndemandW<DfllctrlSpec> {
147        OndemandW::new(self, 7)
148    }
149    #[doc = "Bit 8 - Chill Cycle Disable"]
150    #[inline(always)]
151    #[must_use]
152    pub fn ccdis(&mut self) -> CcdisW<DfllctrlSpec> {
153        CcdisW::new(self, 8)
154    }
155    #[doc = "Bit 9 - Quick Lock Disable"]
156    #[inline(always)]
157    #[must_use]
158    pub fn qldis(&mut self) -> QldisW<DfllctrlSpec> {
159        QldisW::new(self, 9)
160    }
161    #[doc = "Bit 10 - Bypass Coarse Lock"]
162    #[inline(always)]
163    #[must_use]
164    pub fn bplckc(&mut self) -> BplckcW<DfllctrlSpec> {
165        BplckcW::new(self, 10)
166    }
167    #[doc = "Bit 11 - Wait Lock"]
168    #[inline(always)]
169    #[must_use]
170    pub fn waitlock(&mut self) -> WaitlockW<DfllctrlSpec> {
171        WaitlockW::new(self, 11)
172    }
173}
174#[doc = "DFLL48M Control\n\nYou can [`read`](crate::Reg::read) this register and get [`dfllctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dfllctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
175pub struct DfllctrlSpec;
176impl crate::RegisterSpec for DfllctrlSpec {
177    type Ux = u16;
178}
179#[doc = "`read()` method returns [`dfllctrl::R`](R) reader structure"]
180impl crate::Readable for DfllctrlSpec {}
181#[doc = "`write(|w| ..)` method takes [`dfllctrl::W`](W) writer structure"]
182impl crate::Writable for DfllctrlSpec {
183    type Safety = crate::Unsafe;
184    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
185    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
186}
187#[doc = "`reset()` method sets DFLLCTRL to value 0x80"]
188impl crate::Resettable for DfllctrlSpec {
189    const RESET_VALUE: u16 = 0x80;
190}
atsamd11d/sysctrl/dfllctrl.rs

atsamd11d/sysctrl/
dfllctrl.rs
