atsamd11d/usb/device/
intenset.rs
1#[doc = "Register `INTENSET` reader"]
2pub type R = crate::R<IntensetSpec>;
3#[doc = "Register `INTENSET` writer"]
4pub type W = crate::W<IntensetSpec>;
5#[doc = "Field `SUSPEND` reader - Suspend Interrupt Enable"]
6pub type SuspendR = crate::BitReader;
7#[doc = "Field `SUSPEND` writer - Suspend Interrupt Enable"]
8pub type SuspendW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `MSOF` reader - Micro Start of Frame Interrupt Enable in High Speed Mode"]
10pub type MsofR = crate::BitReader;
11#[doc = "Field `MSOF` writer - Micro Start of Frame Interrupt Enable in High Speed Mode"]
12pub type MsofW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SOF` reader - Start Of Frame Interrupt Enable"]
14pub type SofR = crate::BitReader;
15#[doc = "Field `SOF` writer - Start Of Frame Interrupt Enable"]
16pub type SofW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `EORST` reader - End of Reset Interrupt Enable"]
18pub type EorstR = crate::BitReader;
19#[doc = "Field `EORST` writer - End of Reset Interrupt Enable"]
20pub type EorstW<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `WAKEUP` reader - Wake Up Interrupt Enable"]
22pub type WakeupR = crate::BitReader;
23#[doc = "Field `WAKEUP` writer - Wake Up Interrupt Enable"]
24pub type WakeupW<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `EORSM` reader - End Of Resume Interrupt Enable"]
26pub type EorsmR = crate::BitReader;
27#[doc = "Field `EORSM` writer - End Of Resume Interrupt Enable"]
28pub type EorsmW<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `UPRSM` reader - Upstream Resume Interrupt Enable"]
30pub type UprsmR = crate::BitReader;
31#[doc = "Field `UPRSM` writer - Upstream Resume Interrupt Enable"]
32pub type UprsmW<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `RAMACER` reader - Ram Access Interrupt Enable"]
34pub type RamacerR = crate::BitReader;
35#[doc = "Field `RAMACER` writer - Ram Access Interrupt Enable"]
36pub type RamacerW<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `LPMNYET` reader - Link Power Management Not Yet Interrupt Enable"]
38pub type LpmnyetR = crate::BitReader;
39#[doc = "Field `LPMNYET` writer - Link Power Management Not Yet Interrupt Enable"]
40pub type LpmnyetW<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `LPMSUSP` reader - Link Power Management Suspend Interrupt Enable"]
42pub type LpmsuspR = crate::BitReader;
43#[doc = "Field `LPMSUSP` writer - Link Power Management Suspend Interrupt Enable"]
44pub type LpmsuspW<'a, REG> = crate::BitWriter<'a, REG>;
45impl R {
46 #[doc = "Bit 0 - Suspend Interrupt Enable"]
47 #[inline(always)]
48 pub fn suspend(&self) -> SuspendR {
49 SuspendR::new((self.bits & 1) != 0)
50 }
51 #[doc = "Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode"]
52 #[inline(always)]
53 pub fn msof(&self) -> MsofR {
54 MsofR::new(((self.bits >> 1) & 1) != 0)
55 }
56 #[doc = "Bit 2 - Start Of Frame Interrupt Enable"]
57 #[inline(always)]
58 pub fn sof(&self) -> SofR {
59 SofR::new(((self.bits >> 2) & 1) != 0)
60 }
61 #[doc = "Bit 3 - End of Reset Interrupt Enable"]
62 #[inline(always)]
63 pub fn eorst(&self) -> EorstR {
64 EorstR::new(((self.bits >> 3) & 1) != 0)
65 }
66 #[doc = "Bit 4 - Wake Up Interrupt Enable"]
67 #[inline(always)]
68 pub fn wakeup(&self) -> WakeupR {
69 WakeupR::new(((self.bits >> 4) & 1) != 0)
70 }
71 #[doc = "Bit 5 - End Of Resume Interrupt Enable"]
72 #[inline(always)]
73 pub fn eorsm(&self) -> EorsmR {
74 EorsmR::new(((self.bits >> 5) & 1) != 0)
75 }
76 #[doc = "Bit 6 - Upstream Resume Interrupt Enable"]
77 #[inline(always)]
78 pub fn uprsm(&self) -> UprsmR {
79 UprsmR::new(((self.bits >> 6) & 1) != 0)
80 }
81 #[doc = "Bit 7 - Ram Access Interrupt Enable"]
82 #[inline(always)]
83 pub fn ramacer(&self) -> RamacerR {
84 RamacerR::new(((self.bits >> 7) & 1) != 0)
85 }
86 #[doc = "Bit 8 - Link Power Management Not Yet Interrupt Enable"]
87 #[inline(always)]
88 pub fn lpmnyet(&self) -> LpmnyetR {
89 LpmnyetR::new(((self.bits >> 8) & 1) != 0)
90 }
91 #[doc = "Bit 9 - Link Power Management Suspend Interrupt Enable"]
92 #[inline(always)]
93 pub fn lpmsusp(&self) -> LpmsuspR {
94 LpmsuspR::new(((self.bits >> 9) & 1) != 0)
95 }
96}
97impl W {
98 #[doc = "Bit 0 - Suspend Interrupt Enable"]
99 #[inline(always)]
100 #[must_use]
101 pub fn suspend(&mut self) -> SuspendW<IntensetSpec> {
102 SuspendW::new(self, 0)
103 }
104 #[doc = "Bit 1 - Micro Start of Frame Interrupt Enable in High Speed Mode"]
105 #[inline(always)]
106 #[must_use]
107 pub fn msof(&mut self) -> MsofW<IntensetSpec> {
108 MsofW::new(self, 1)
109 }
110 #[doc = "Bit 2 - Start Of Frame Interrupt Enable"]
111 #[inline(always)]
112 #[must_use]
113 pub fn sof(&mut self) -> SofW<IntensetSpec> {
114 SofW::new(self, 2)
115 }
116 #[doc = "Bit 3 - End of Reset Interrupt Enable"]
117 #[inline(always)]
118 #[must_use]
119 pub fn eorst(&mut self) -> EorstW<IntensetSpec> {
120 EorstW::new(self, 3)
121 }
122 #[doc = "Bit 4 - Wake Up Interrupt Enable"]
123 #[inline(always)]
124 #[must_use]
125 pub fn wakeup(&mut self) -> WakeupW<IntensetSpec> {
126 WakeupW::new(self, 4)
127 }
128 #[doc = "Bit 5 - End Of Resume Interrupt Enable"]
129 #[inline(always)]
130 #[must_use]
131 pub fn eorsm(&mut self) -> EorsmW<IntensetSpec> {
132 EorsmW::new(self, 5)
133 }
134 #[doc = "Bit 6 - Upstream Resume Interrupt Enable"]
135 #[inline(always)]
136 #[must_use]
137 pub fn uprsm(&mut self) -> UprsmW<IntensetSpec> {
138 UprsmW::new(self, 6)
139 }
140 #[doc = "Bit 7 - Ram Access Interrupt Enable"]
141 #[inline(always)]
142 #[must_use]
143 pub fn ramacer(&mut self) -> RamacerW<IntensetSpec> {
144 RamacerW::new(self, 7)
145 }
146 #[doc = "Bit 8 - Link Power Management Not Yet Interrupt Enable"]
147 #[inline(always)]
148 #[must_use]
149 pub fn lpmnyet(&mut self) -> LpmnyetW<IntensetSpec> {
150 LpmnyetW::new(self, 8)
151 }
152 #[doc = "Bit 9 - Link Power Management Suspend Interrupt Enable"]
153 #[inline(always)]
154 #[must_use]
155 pub fn lpmsusp(&mut self) -> LpmsuspW<IntensetSpec> {
156 LpmsuspW::new(self, 9)
157 }
158}
159#[doc = "DEVICE Device Interrupt Enable Set\n\nYou can [`read`](crate::Reg::read) this register and get [`intenset::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intenset::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
160pub struct IntensetSpec;
161impl crate::RegisterSpec for IntensetSpec {
162 type Ux = u16;
163}
164#[doc = "`read()` method returns [`intenset::R`](R) reader structure"]
165impl crate::Readable for IntensetSpec {}
166#[doc = "`write(|w| ..)` method takes [`intenset::W`](W) writer structure"]
167impl crate::Writable for IntensetSpec {
168 type Safety = crate::Unsafe;
169 const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
170 const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
171}
172#[doc = "`reset()` method sets INTENSET to value 0"]
173impl crate::Resettable for IntensetSpec {
174 const RESET_VALUE: u16 = 0;
175}