atsamd11d/dmac/
ctrl.rs

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1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CtrlSpec>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CtrlSpec>;
5#[doc = "Field `SWRST` reader - Software Reset"]
6pub type SwrstR = crate::BitReader;
7#[doc = "Field `SWRST` writer - Software Reset"]
8pub type SwrstW<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DMAENABLE` reader - DMA Enable"]
10pub type DmaenableR = crate::BitReader;
11#[doc = "Field `DMAENABLE` writer - DMA Enable"]
12pub type DmaenableW<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CRCENABLE` reader - CRC Enable"]
14pub type CrcenableR = crate::BitReader;
15#[doc = "Field `CRCENABLE` writer - CRC Enable"]
16pub type CrcenableW<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `LVLEN0` reader - Priority Level 0 Enable"]
18pub type Lvlen0R = crate::BitReader;
19#[doc = "Field `LVLEN0` writer - Priority Level 0 Enable"]
20pub type Lvlen0W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `LVLEN1` reader - Priority Level 1 Enable"]
22pub type Lvlen1R = crate::BitReader;
23#[doc = "Field `LVLEN1` writer - Priority Level 1 Enable"]
24pub type Lvlen1W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `LVLEN2` reader - Priority Level 2 Enable"]
26pub type Lvlen2R = crate::BitReader;
27#[doc = "Field `LVLEN2` writer - Priority Level 2 Enable"]
28pub type Lvlen2W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `LVLEN3` reader - Priority Level 3 Enable"]
30pub type Lvlen3R = crate::BitReader;
31#[doc = "Field `LVLEN3` writer - Priority Level 3 Enable"]
32pub type Lvlen3W<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34    #[doc = "Bit 0 - Software Reset"]
35    #[inline(always)]
36    pub fn swrst(&self) -> SwrstR {
37        SwrstR::new((self.bits & 1) != 0)
38    }
39    #[doc = "Bit 1 - DMA Enable"]
40    #[inline(always)]
41    pub fn dmaenable(&self) -> DmaenableR {
42        DmaenableR::new(((self.bits >> 1) & 1) != 0)
43    }
44    #[doc = "Bit 2 - CRC Enable"]
45    #[inline(always)]
46    pub fn crcenable(&self) -> CrcenableR {
47        CrcenableR::new(((self.bits >> 2) & 1) != 0)
48    }
49    #[doc = "Bit 8 - Priority Level 0 Enable"]
50    #[inline(always)]
51    pub fn lvlen0(&self) -> Lvlen0R {
52        Lvlen0R::new(((self.bits >> 8) & 1) != 0)
53    }
54    #[doc = "Bit 9 - Priority Level 1 Enable"]
55    #[inline(always)]
56    pub fn lvlen1(&self) -> Lvlen1R {
57        Lvlen1R::new(((self.bits >> 9) & 1) != 0)
58    }
59    #[doc = "Bit 10 - Priority Level 2 Enable"]
60    #[inline(always)]
61    pub fn lvlen2(&self) -> Lvlen2R {
62        Lvlen2R::new(((self.bits >> 10) & 1) != 0)
63    }
64    #[doc = "Bit 11 - Priority Level 3 Enable"]
65    #[inline(always)]
66    pub fn lvlen3(&self) -> Lvlen3R {
67        Lvlen3R::new(((self.bits >> 11) & 1) != 0)
68    }
69}
70impl W {
71    #[doc = "Bit 0 - Software Reset"]
72    #[inline(always)]
73    #[must_use]
74    pub fn swrst(&mut self) -> SwrstW<CtrlSpec> {
75        SwrstW::new(self, 0)
76    }
77    #[doc = "Bit 1 - DMA Enable"]
78    #[inline(always)]
79    #[must_use]
80    pub fn dmaenable(&mut self) -> DmaenableW<CtrlSpec> {
81        DmaenableW::new(self, 1)
82    }
83    #[doc = "Bit 2 - CRC Enable"]
84    #[inline(always)]
85    #[must_use]
86    pub fn crcenable(&mut self) -> CrcenableW<CtrlSpec> {
87        CrcenableW::new(self, 2)
88    }
89    #[doc = "Bit 8 - Priority Level 0 Enable"]
90    #[inline(always)]
91    #[must_use]
92    pub fn lvlen0(&mut self) -> Lvlen0W<CtrlSpec> {
93        Lvlen0W::new(self, 8)
94    }
95    #[doc = "Bit 9 - Priority Level 1 Enable"]
96    #[inline(always)]
97    #[must_use]
98    pub fn lvlen1(&mut self) -> Lvlen1W<CtrlSpec> {
99        Lvlen1W::new(self, 9)
100    }
101    #[doc = "Bit 10 - Priority Level 2 Enable"]
102    #[inline(always)]
103    #[must_use]
104    pub fn lvlen2(&mut self) -> Lvlen2W<CtrlSpec> {
105        Lvlen2W::new(self, 10)
106    }
107    #[doc = "Bit 11 - Priority Level 3 Enable"]
108    #[inline(always)]
109    #[must_use]
110    pub fn lvlen3(&mut self) -> Lvlen3W<CtrlSpec> {
111        Lvlen3W::new(self, 11)
112    }
113}
114#[doc = "Control\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
115pub struct CtrlSpec;
116impl crate::RegisterSpec for CtrlSpec {
117    type Ux = u16;
118}
119#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
120impl crate::Readable for CtrlSpec {}
121#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
122impl crate::Writable for CtrlSpec {
123    type Safety = crate::Unsafe;
124    const ZERO_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
125    const ONE_TO_MODIFY_FIELDS_BITMAP: u16 = 0;
126}
127#[doc = "`reset()` method sets CTRL to value 0"]
128impl crate::Resettable for CtrlSpec {
129    const RESET_VALUE: u16 = 0;
130}
atsamd11d/dmac/ctrl.rs

atsamd11d/dmac/
ctrl.rs
