Files
atsamd21e18a
ac
adc
dac
dmac
dsu
eic
evsys
gclk
hmatrix
i2s
mtb
nvmctrl
pac0
pm
port
rtc
mode0
mode1
mode2
sercom0
i2cm
i2cs
spi
usart
sysctrl
tc3
count16
count32
count8
tcc0
cc.rscc_dith4.rscc_dith5.rscc_dith6.rsccb.rsccb_dith4.rsccb_dith5.rsccb_dith6.rscount.rscount_dith4.rscount_dith5.rscount_dith6.rsctrla.rsctrlbclr.rsctrlbset.rsdbgctrl.rsdrvctrl.rsevctrl.rsfctrla.rsfctrlb.rsintenclr.rsintenset.rsintflag.rspatt.rspattb.rsper.rsper_dith4.rsper_dith5.rsper_dith6.rsperb.rsperb_dith4.rsperb_dith5.rsperb_dith6.rsstatus.rssyncbusy.rswave.rswaveb.rswexctrl.rs
usb
device
host
wdt
atsamd21g18a
ac
adc
dac
dmac
dsu
eic
evsys
gclk
hmatrix
i2s
mtb
nvmctrl
pac0
pm
port
rtc
mode0
mode1
mode2
sercom0
i2cm
i2cs
spi
usart
sysctrl
tc3
count16
count32
count8
tcc0
cc.rscc_dith4.rscc_dith5.rscc_dith6.rsccb.rsccb_dith4.rsccb_dith5.rsccb_dith6.rscount.rscount_dith4.rscount_dith5.rscount_dith6.rsctrla.rsctrlbclr.rsctrlbset.rsdbgctrl.rsdrvctrl.rsevctrl.rsfctrla.rsfctrlb.rsintenclr.rsintenset.rsintflag.rspatt.rspattb.rsper.rsper_dith4.rsper_dith5.rsper_dith6.rsperb.rsperb_dith4.rsperb_dith5.rsperb_dith6.rsstatus.rssyncbusy.rswave.rswaveb.rswexctrl.rs
usb
device
host
wdt
atsamd51j19a
ac
adc0
aes
ccl
cmcc
dac
dmac
dsu
eic
evsys
freqm
gclk
hmatrix
i2s
icm
mclk
nvmctrl
osc32kctrl
oscctrl
pac
pcc
pdec
pm
port
qspi
ramecc
rstc
rtc
mode0
mode1
mode2
sdhc0
acesr.rsacr.rsaesr.rsarg1r.rsasar.rsbcr.rsbdpr.rsbgcr.rsbgcr_emmc.rsbsr.rsca0r.rsca1r.rscacr.rscc2r.rsccr.rscr.rsdbgr.rseisier.rseisier_emmc.rseister.rseister_emmc.rseistr.rseistr_emmc.rsferaces.rsfereis.rshc1r.rshc1r_emmc.rshc2r.rshc2r_emmc.rshcvr.rsmc1r.rsmc2r.rsmccar.rsnisier.rsnisier_emmc.rsnister.rsnister_emmc.rsnistr.rsnistr_emmc.rspcr.rspsr.rspvr.rsrr.rssisr.rssrr.rsssar.rsssar_cmd23.rstcr.rstmr.rswcr.rs
sercom0
i2cm
i2cs
spi
usart
supc
tc0
count16
count32
count8
tcc0
cc.rscc_dith4.rscc_dith5.rscc_dith6.rsccbuf.rsccbuf_dith4.rsccbuf_dith5.rsccbuf_dith6.rscount.rscount_dith4.rscount_dith5.rscount_dith6.rsctrla.rsctrlbclr.rsctrlbset.rsdbgctrl.rsdrvctrl.rsevctrl.rsfctrla.rsfctrlb.rsintenclr.rsintenset.rsintflag.rspatt.rspattbuf.rsper.rsper_dith4.rsper_dith5.rsper_dith6.rsperbuf.rsperbuf_dith4.rsperbuf_dith5.rsperbuf_dith6.rsstatus.rssyncbusy.rswave.rswexctrl.rs
trng
usb
device
host
wdt
>
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#[doc = r" Value read from the register"] pub struct R { bits: u32, } impl super::PID2 { #[doc = r" Reads the contents of the register"] #[inline] pub fn read(&self) -> R { R { bits: self.register.get(), } } } impl R { #[doc = r" Value of the register as raw bits"] #[inline] pub fn bits(&self) -> u32 { self.bits } }