pub struct Xosc32kCfd { /* private fields */ }
Expand description

Clock failure detection interface for the XOSC32K peripheral

The XOSC32K peripheral provides a hardware method to continuously monitor the clock to verify it is still running. In the event of a failure, the output will be switched to a “safe clock” derived from the OscUlp32k. The XOSC32K peripheral provides a prescaler to optionally divide the OscUlp32k by two.

Note that clock failure is triggered when four safe clock periods pass without seeing a rising & falling edge pair on the XOSC32K clock. Once failure is detected, the corresponding bit in the STATUS register will go high and an interrupt will be triggered.

If the external clock can be fixed, the XOSC32K clock can be switched back using Xosc32kCfd::switch_back.

Because the safe clock makes use of the OscUlp32k, the Xosc32kCfd must register as a consumer of the EnabledOscUlp32k and Increment its counter.

Implementations

Enable continuous monitoring of the XOSC32K for clock failure

Because the safe clock makes use of the OscUlp32k, the Xosc32kCfd must register as a consumer of the EnabledOscUlp32k and Increment its counter.

Check whether the XOSC32K has triggered clock failure detection

Failure is triggered when four safe clock periods pass without seeing a rising & falling edge pair on the XOSC32K clock.

Check whether the XOSC32K has been switched to the safe clock

Returns true if the XOSC32K has been switched to the safe clock.

Attempt to switch from the safe clock back to the external clock

This function will set the switch back bit (SWBACK) in the CFDCTRL register. Once the hardware has successfully switched back, this bit will be automatically cleared.

Users can check whether switching back was successful by checking the STATUS register with Xosc32kCfd::is_switched.

Disable continuous monitoring of the XOSC32K for clock failure

Once failure monitoring is disabled, the OscUlp32k is no longer used as the safe clock, so the EnabledOscUlp32k counter can be Decremented.

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