#[repr(u8)]
pub enum SafeClockDiv {
    Div1,
    Div2,
}
Expand description

Division factor for the safe clock prescaler

If an XOSC32K clock failure is detected, the hardware will switch to a safe clock derived from the OscUlp32k. This enum sets the divider between it and the safe clock frequency. The divider can be 1 or 2.

Variants

Div1

Div2

Trait Implementations

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