#[repr(u8)]
pub enum StartUpDelay {
Show 16 variants Delay31us, Delay62us, Delay122us, Delay244us, Delay488us, Delay977us, Delay2ms, Delay4ms, Delay8ms, Delay16ms, Delay31ms, Delay63ms, Delay125ms, Delay250ms, Delay500ms, Delay1s,
}
Expand description

Start up delay before continuous Xosc monitoring takes effect

After a hard reset or waking from sleep, the Xosc output will remained masked for the start up period, to ensure an unstable clock is not propagated into the digital logic.

The start up delay is counted using the OscUlp32k clock, and the delay is equal to 2^N clock cycles, where N is selectable in the range 0..16.

Variants

Delay31us

Delay62us

Delay122us

Delay244us

Delay488us

Delay977us

Delay2ms

Delay4ms

Delay8ms

Delay16ms

Delay31ms

Delay63ms

Delay125ms

Delay250ms

Delay500ms

Delay1s

Trait Implementations

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