Module sdhc0

Source
Expand description

SD/MMC Host Controller

Modules§

acesr
Auto CMD Error Status
acr
AHB Control
aesr
ADMA Error Status
apsr
Additional Present State Register
arg1r
Argument 1
asar
ADMA System Address
bcr
Block Count
bdpr
Buffer Data Port
bgcr
Block Gap Control
bgcr_emmc_mode
Block Gap Control
bsr
Block Size
ca0r
Capabilities 0
ca1r
Capabilities 1
cacr
Capabilities Control
cc2r
Clock Control 2
ccr
Clock Control
cr
Command
dbgr
Debug
eisier
Error Interrupt Signal Enable
eisier_emmc_mode
Error Interrupt Signal Enable
eister
Error Interrupt Status Enable
eister_emmc_mode
Error Interrupt Status Enable
eistr
Error Interrupt Status
eistr_emmc_mode
Error Interrupt Status
feraces
Force Event for Auto CMD Error Status
fereis
Force Event for Error Interrupt Status
hc1r
Host Control 1
hc1r_emmc_mode
Host Control 1
hc2r
Host Control 2
hc2r_emmc_mode
Host Control 2
hcvr
Host Controller Version
mc1r
MMC Control 1
mc2r
MMC Control 2
mccar
Maximum Current Capabilities
nisier
Normal Interrupt Signal Enable
nisier_emmc_mode
Normal Interrupt Signal Enable
nister
Normal Interrupt Status Enable
nister_emmc_mode
Normal Interrupt Status Enable
nistr
Normal Interrupt Status
nistr_emmc_mode
Normal Interrupt Status
pcr
Power Control
psr
Present State
pvr
Preset Value n
rr
Response
sisr
Slot Interrupt Status
srr
Software Reset
ssar
SDMA System Address / Argument 2
ssar_cmd23_mode
SDMA System Address / Argument 2
tcr
Timeout Control
tmr
Transfer Mode
wcr
Wakeup Control

Structs§

RegisterBlock
Register block

Type Aliases§

Acesr
ACESR (r) register accessor: Auto CMD Error Status
Acr
ACR (rw) register accessor: AHB Control
Aesr
AESR (r) register accessor: ADMA Error Status
Apsr
APSR (r) register accessor: Additional Present State Register
Arg1r
ARG1R (rw) register accessor: Argument 1
Asar
ASAR (rw) register accessor: ADMA System Address
Bcr
BCR (rw) register accessor: Block Count
Bdpr
BDPR (rw) register accessor: Buffer Data Port
Bgcr
BGCR (rw) register accessor: Block Gap Control
BgcrEmmcMode
BGCR_EMMC_MODE (rw) register accessor: Block Gap Control
Bsr
BSR (rw) register accessor: Block Size
Ca0r
CA0R (r) register accessor: Capabilities 0
Ca1r
CA1R (r) register accessor: Capabilities 1
Cacr
CACR (rw) register accessor: Capabilities Control
Cc2r
CC2R (rw) register accessor: Clock Control 2
Ccr
CCR (rw) register accessor: Clock Control
Cr
CR (rw) register accessor: Command
Dbgr
DBGR (rw) register accessor: Debug
Eisier
EISIER (rw) register accessor: Error Interrupt Signal Enable
EisierEmmcMode
EISIER_EMMC_MODE (rw) register accessor: Error Interrupt Signal Enable
Eister
EISTER (rw) register accessor: Error Interrupt Status Enable
EisterEmmcMode
EISTER_EMMC_MODE (rw) register accessor: Error Interrupt Status Enable
Eistr
EISTR (rw) register accessor: Error Interrupt Status
EistrEmmcMode
EISTR_EMMC_MODE (rw) register accessor: Error Interrupt Status
Feraces
FERACES (w) register accessor: Force Event for Auto CMD Error Status
Fereis
FEREIS (w) register accessor: Force Event for Error Interrupt Status
Hc1r
HC1R (rw) register accessor: Host Control 1
Hc1rEmmcMode
HC1R_EMMC_MODE (rw) register accessor: Host Control 1
Hc2r
HC2R (rw) register accessor: Host Control 2
Hc2rEmmcMode
HC2R_EMMC_MODE (rw) register accessor: Host Control 2
Hcvr
HCVR (r) register accessor: Host Controller Version
Mc1r
MC1R (rw) register accessor: MMC Control 1
Mc2r
MC2R (w) register accessor: MMC Control 2
Mccar
MCCAR (r) register accessor: Maximum Current Capabilities
Nisier
NISIER (rw) register accessor: Normal Interrupt Signal Enable
NisierEmmcMode
NISIER_EMMC_MODE (rw) register accessor: Normal Interrupt Signal Enable
Nister
NISTER (rw) register accessor: Normal Interrupt Status Enable
NisterEmmcMode
NISTER_EMMC_MODE (rw) register accessor: Normal Interrupt Status Enable
Nistr
NISTR (rw) register accessor: Normal Interrupt Status
NistrEmmcMode
NISTR_EMMC_MODE (rw) register accessor: Normal Interrupt Status
Pcr
PCR (rw) register accessor: Power Control
Psr
PSR (r) register accessor: Present State
Pvr
PVR (rw) register accessor: Preset Value n
Rr
RR (r) register accessor: Response
Sisr
SISR (r) register accessor: Slot Interrupt Status
Srr
SRR (rw) register accessor: Software Reset
Ssar
SSAR (rw) register accessor: SDMA System Address / Argument 2
SsarCmd23Mode
SSAR_CMD23_MODE (rw) register accessor: SDMA System Address / Argument 2
Tcr
TCR (rw) register accessor: Timeout Control
Tmr
TMR (rw) register accessor: Transfer Mode
Wcr
WCR (rw) register accessor: Wakeup Control