Module mtb

Source
Expand description

Cortex-M0+ Micro-Trace Buffer

Modules§

authstatus
MTB Authentication Status
base
MTB Base
cid0
CoreSight
cid1
CoreSight
cid2
CoreSight
cid3
CoreSight
claimclr
MTB Claim Clear
claimset
MTB Claim Set
devarch
MTB Device Architecture
devid
MTB Device Configuration
devtype
MTB Device Type
flow
MTB Flow
itctrl
MTB Integration Mode Control
lockaccess
MTB Lock Access
lockstatus
MTB Lock Status
master
MTB Master
pid0
CoreSight
pid1
CoreSight
pid2
CoreSight
pid3
CoreSight
pid4
CoreSight
pid5
CoreSight
pid6
CoreSight
pid7
CoreSight
position
MTB Position

Structs§

RegisterBlock
Register block

Type Aliases§

Authstatus
AUTHSTATUS (r) register accessor: MTB Authentication Status
Base
BASE (r) register accessor: MTB Base
Cid0
CID0 (r) register accessor: CoreSight
Cid1
CID1 (r) register accessor: CoreSight
Cid2
CID2 (r) register accessor: CoreSight
Cid3
CID3 (r) register accessor: CoreSight
Claimclr
CLAIMCLR (rw) register accessor: MTB Claim Clear
Claimset
CLAIMSET (rw) register accessor: MTB Claim Set
Devarch
DEVARCH (r) register accessor: MTB Device Architecture
Devid
DEVID (r) register accessor: MTB Device Configuration
Devtype
DEVTYPE (r) register accessor: MTB Device Type
Flow
FLOW (rw) register accessor: MTB Flow
Itctrl
ITCTRL (rw) register accessor: MTB Integration Mode Control
Lockaccess
LOCKACCESS (rw) register accessor: MTB Lock Access
Lockstatus
LOCKSTATUS (r) register accessor: MTB Lock Status
Master
MASTER (rw) register accessor: MTB Master
Pid0
PID0 (r) register accessor: CoreSight
Pid1
PID1 (r) register accessor: CoreSight
Pid2
PID2 (r) register accessor: CoreSight
Pid3
PID3 (r) register accessor: CoreSight
Pid4
PID4 (r) register accessor: CoreSight
Pid5
PID5 (r) register accessor: CoreSight
Pid6
PID6 (r) register accessor: CoreSight
Pid7
PID7 (r) register accessor: CoreSight
Position
POSITION (rw) register accessor: MTB Position