Expand description
Direct Memory Access Controller
Modules§
- active
- Active Channel and Levels
- baseaddr
- Descriptor Memory Section Base Address
- busych
- Busy Channels
- chctrla
- Channel Control A
- chctrlb
- Channel Control B
- chid
- Channel ID
- chintenclr
- Channel Interrupt Enable Clear
- chintenset
- Channel Interrupt Enable Set
- chintflag
- Channel Interrupt Flag Status and Clear
- chstatus
- Channel Status
- crcchksum
- CRC Checksum
- crcctrl
- CRC Control
- crcdatain
- CRC Data Input
- crcstatus
- CRC Status
- ctrl
- Control
- dbgctrl
- Debug Control
- intpend
- Interrupt Pending
- intstatus
- Interrupt Status
- pendch
- Pending Channels
- prictrl0
- Priority Control 0
- qosctrl
- QOS Control
- swtrigctrl
- Software Trigger Control
- wrbaddr
- Write-Back Memory Section Base Address
Structs§
- Register
Block - Register block
Type Aliases§
- Active
- ACTIVE (r) register accessor: Active Channel and Levels
- Baseaddr
- BASEADDR (rw) register accessor: Descriptor Memory Section Base Address
- Busych
- BUSYCH (r) register accessor: Busy Channels
- Chctrla
- CHCTRLA (rw) register accessor: Channel Control A
- Chctrlb
- CHCTRLB (rw) register accessor: Channel Control B
- Chid
- CHID (rw) register accessor: Channel ID
- Chintenclr
- CHINTENCLR (rw) register accessor: Channel Interrupt Enable Clear
- Chintenset
- CHINTENSET (rw) register accessor: Channel Interrupt Enable Set
- Chintflag
- CHINTFLAG (rw) register accessor: Channel Interrupt Flag Status and Clear
- Chstatus
- CHSTATUS (r) register accessor: Channel Status
- Crcchksum
- CRCCHKSUM (rw) register accessor: CRC Checksum
- Crcctrl
- CRCCTRL (rw) register accessor: CRC Control
- Crcdatain
- CRCDATAIN (rw) register accessor: CRC Data Input
- Crcstatus
- CRCSTATUS (rw) register accessor: CRC Status
- Ctrl
- CTRL (rw) register accessor: Control
- Dbgctrl
- DBGCTRL (rw) register accessor: Debug Control
- Intpend
- INTPEND (rw) register accessor: Interrupt Pending
- Intstatus
- INTSTATUS (r) register accessor: Interrupt Status
- Pendch
- PENDCH (r) register accessor: Pending Channels
- Prictrl0
- PRICTRL0 (rw) register accessor: Priority Control 0
- Qosctrl
- QOSCTRL (rw) register accessor: QOS Control
- Swtrigctrl
- SWTRIGCTRL (rw) register accessor: Software Trigger Control
- Wrbaddr
- WRBADDR (rw) register accessor: Write-Back Memory Section Base Address