Expand description
Device Service Unit
Modules§
- addr
- Address
- cid0
- Component Identification 0
- cid1
- Component Identification 1
- cid2
- Component Identification 2
- cid3
- Component Identification 3
- ctrl
- Control
- data
- Data
- dcc
- Debug Communication Channel n
- did
- Device Identification
- end
- CoreSight ROM Table End
- entry
- CoreSight ROM Table Entry 0
- entry1
- CoreSight ROM Table Entry 1
- length
- Length
- memtype
- CoreSight ROM Table Memory Type
- pid0
- Peripheral Identification 0
- pid1
- Peripheral Identification 1
- pid2
- Peripheral Identification 2
- pid3
- Peripheral Identification 3
- pid4
- Peripheral Identification 4
- statusa
- Status A
- statusb
- Status B
Structs§
- Register
Block - Register block
Type Aliases§
- Addr
- ADDR (rw) register accessor: Address
- Cid0
- CID0 (r) register accessor: Component Identification 0
- Cid1
- CID1 (r) register accessor: Component Identification 1
- Cid2
- CID2 (r) register accessor: Component Identification 2
- Cid3
- CID3 (r) register accessor: Component Identification 3
- Ctrl
- CTRL (w) register accessor: Control
- Data
- DATA (rw) register accessor: Data
- Dcc
- DCC (rw) register accessor: Debug Communication Channel n
- Did
- DID (r) register accessor: Device Identification
- End
- END (r) register accessor: CoreSight ROM Table End
- Entry
- ENTRY (r) register accessor: CoreSight ROM Table Entry 0
- Entry1
- ENTRY1 (r) register accessor: CoreSight ROM Table Entry 1
- Length
- LENGTH (rw) register accessor: Length
- Memtype
- MEMTYPE (r) register accessor: CoreSight ROM Table Memory Type
- Pid0
- PID0 (r) register accessor: Peripheral Identification 0
- Pid1
- PID1 (r) register accessor: Peripheral Identification 1
- Pid2
- PID2 (r) register accessor: Peripheral Identification 2
- Pid3
- PID3 (r) register accessor: Peripheral Identification 3
- Pid4
- PID4 (r) register accessor: Peripheral Identification 4
- Statusa
- STATUSA (rw) register accessor: Status A
- Statusb
- STATUSB (r) register accessor: Status B