pub struct Uart<C, D>where
C: ValidConfig,
D: Capability,{ /* private fields */ }
Expand description
Abstraction over a UART peripheral, allowing to perform UART transactions.
The second type parameter, D
, denotes what the struct’s Capability
is.
Implementations
sourceimpl<C, D> Uart<C, D>where
C: ValidConfig,
D: Capability,
impl<C, D> Uart<C, D>where
C: ValidConfig,
D: Capability,
sourcepub fn read_flags(&self) -> Flags
pub fn read_flags(&self) -> Flags
Read the interrupt flags
sourcepub fn clear_flags(&mut self, flags: Flags)
pub fn clear_flags(&mut self, flags: Flags)
Clear interrupt status flags
Setting the ERROR
, RXBRK
, CTSIC
, RXS
, or TXC
flag will clear
the interrupts. This function has no effect on the DRE
or
RXC
flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED.
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
flag can only be cleared if aCTS
Pad was specified in theConfig
via theclear_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
Warning: The implementation of of
Write::flush
waits on and
clears the TXC
flag. Manually clearing this flag could cause it to
hang indefinitely.
sourcepub fn enable_interrupts(&mut self, flags: Flags)
pub fn enable_interrupts(&mut self, flags: Flags)
Enable interrupts for the specified flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED.
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
interrupt can only be enabled if aCTS
Pad was specified in theConfig
via theenable_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
sourcepub fn disable_interrupts(&mut self, flags: Flags)
pub fn disable_interrupts(&mut self, flags: Flags)
Disable interrupts for the specified flags.
Note that only the flags pertinent to Self
’s Capability
will be cleared. The other flags will be SILENTLY IGNORED
- Available flags for
Receive
capability:RXC
,RXS
,RXBRK
andERROR
- Available flags for
Transmit
capability:DRE
andTXC
. Note: TheCTSIC
interrupt can only be disabled if aCTS
Pad was specified in theConfig
via thedisable_ctsic
method. - Since
Duplex
Uart
s areReceive
+Transmit
they have all flags available.
sourcepub fn read_status(&self) -> Status
pub fn read_status(&self) -> Status
Read the status flags
sourcepub fn clear_status(&mut self, status: Status)
pub fn clear_status(&mut self, status: Status)
Clear the status flags
Note that only the status flags pertinent to Self
’s Capability
will be cleared. The other stattus flags will be SILENTLY IGNORED.
sourceimpl<C, D> Uart<C, D>where
C: ValidConfig,
<C::Pads as PadSet>::Cts: SomePad,
D: Transmit,
impl<C, D> Uart<C, D>where
C: ValidConfig,
<C::Pads as PadSet>::Cts: SomePad,
D: Transmit,
sourcepub fn clear_ctsic(&mut self)
pub fn clear_ctsic(&mut self)
Clear the CTSIC
interrupt flag
sourcepub fn enable_ctsic(&mut self)
pub fn enable_ctsic(&mut self)
Enable the CTSIC
interrupt
sourcepub fn disable_ctsic(&mut self)
pub fn disable_ctsic(&mut self)
Disable the CTSIC
interrupt
sourceimpl<C, D> Uart<C, D>where
C: ValidConfig,
D: Simplex,
impl<C, D> Uart<C, D>where
C: ValidConfig,
D: Simplex,
sourcepub fn reconfigure<U>(&mut self, update: U)where
U: FnOnce(&mut SpecificConfig<C>),
pub fn reconfigure<U>(&mut self, update: U)where
U: FnOnce(&mut SpecificConfig<C>),
Reconfigure the UART.
Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.
use atsamd_hal::sercom::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));
sourceimpl<C> Uart<C, Duplex>where
C: ValidConfig,
impl<C> Uart<C, Duplex>where
C: ValidConfig,
sourcepub fn reconfigure<F>(&mut self, update: F)where
F: FnOnce(&mut SpecificConfig<C>),
pub fn reconfigure<F>(&mut self, update: F)where
F: FnOnce(&mut SpecificConfig<C>),
Update the UART Config
uration.
Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.
use atsamd_hal::sercom::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));
sourceimpl<C, D> Uart<C, D>where
C: ValidConfig,
D: Receive,
DataReg: AsPrimitive<C::Word>,
impl<C, D> Uart<C, D>where
C: ValidConfig,
D: Receive,
DataReg: AsPrimitive<C::Word>,
sourcepub unsafe fn read_data(&mut self) -> DataReg
pub unsafe fn read_data(&mut self) -> DataReg
Read from the DATA register
Safety
Reading from the data register directly is unsafe
, because it will
clear the RXC flag, which could break assumptions made elsewhere in
this module.
sourcepub fn flush_rx_buffer(&mut self)
pub fn flush_rx_buffer(&mut self)
Flush the RX buffer and clear RX errors.
Note: The datasheet states that disabling the receiver (RXEN) clears the RX buffer, and clears the BUFOVF, PERR and FERR bits. However, in practice, it seems like BUFOVF errors still pop up after a disable/enable cycle of the receiver, then immediately begin reading bytes from the DATA register. Instead, this method uses a workaround, which reads a few bytes to clear the RX buffer (3 bytes seems to be the trick), then manually clear the error bits.
sourceimpl<C, D> Uart<C, D>where
C: ValidConfig,
D: Transmit,
impl<C, D> Uart<C, D>where
C: ValidConfig,
D: Transmit,
sourcepub unsafe fn write_data(&mut self, data: DataReg)
pub unsafe fn write_data(&mut self, data: DataReg)
Write to the DATA register
Safety
Writing to the data register directly is unsafe
, because it will clear
the DRE flag, which could break assumptions made elsewhere in this
module.