Enum atsamd_hal::clock::v2::gclk::GclkDiv16

pub enum GclkDiv16 {
    Div(u16),
    Div2Pow16,
    Div2Pow17,
}

Enum for the clock division factor of Gclk1 only

Choosing the Gclk1 division factor can be complicated, because the set of valid values is not contiguous. For Gclk1, the division factor can be 1-65536 or 131072. GclkDiv16 provides an enum interface to enforce validity of the division factor. See the datasheet for more details.

Variants

Div(u16)

Use a literal division factor

All values in the range [1-65535] are valid. Zero is also valid, but it is interpreted as 1.

Div2Pow16

Use a division factor of 2^16 = 65536

Div2Pow17

Use a division factor of 2^17 = 131072

Trait Implementations

impl Clone for GclkDiv16

fn clone(&self) -> GclkDiv16

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for GclkDiv16

fn default() -> Self

Returns the “default value” for a type.

impl GclkDivider for GclkDiv16

fn divider(&self) -> u32

Returns the actual clock divider value as a u32

fn divsel_div(&self) -> (DIVSEL_A, u16)

Return the corresponding DIVSEL and and DIV register fields

impl Copy for GclkDiv16