Type Alias TrigsrcW

pub type TrigsrcW<'a, REG> = FieldWriter<'a, REG, 6, Trigsrcselect>;

Field TRIGSRC writer - Trigger Source

Aliased Type

struct TrigsrcW<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> TrigsrcW<'a, REG>

where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

pub fn disable(self) -> &'a mut W<REG>

Only software/event triggers

pub fn sercom0_rx(self) -> &'a mut W<REG>

SERCOM0 RX Trigger

pub fn sercom0_tx(self) -> &'a mut W<REG>

SERCOM0 TX Trigger

pub fn sercom1_rx(self) -> &'a mut W<REG>

SERCOM1 RX Trigger

pub fn sercom1_tx(self) -> &'a mut W<REG>

SERCOM1 TX Trigger

pub fn sercom2_rx(self) -> &'a mut W<REG>

SERCOM2 RX Trigger

pub fn sercom2_tx(self) -> &'a mut W<REG>

SERCOM2 TX Trigger

pub fn sercom3_rx(self) -> &'a mut W<REG>

SERCOM3 RX Trigger

pub fn sercom3_tx(self) -> &'a mut W<REG>

SERCOM3 TX Trigger

pub fn sercom4_rx(self) -> &'a mut W<REG>

SERCOM4 RX Trigger

pub fn sercom4_tx(self) -> &'a mut W<REG>

SERCOM4 TX Trigger

pub fn sercom5_rx(self) -> &'a mut W<REG>

SERCOM5 RX Trigger

pub fn sercom5_tx(self) -> &'a mut W<REG>

SERCOM5 TX Trigger

pub fn tcc0_ovf(self) -> &'a mut W<REG>

TCC0 Overflow Trigger

pub fn tcc0_mc0(self) -> &'a mut W<REG>

TCC0 Match/Compare 0 Trigger

pub fn tcc0_mc1(self) -> &'a mut W<REG>

TCC0 Match/Compare 1 Trigger

pub fn tcc0_mc2(self) -> &'a mut W<REG>

TCC0 Match/Compare 2 Trigger

pub fn tcc0_mc3(self) -> &'a mut W<REG>

TCC0 Match/Compare 3 Trigger

pub fn tcc1_ovf(self) -> &'a mut W<REG>

TCC1 Overflow Trigger

pub fn tcc1_mc0(self) -> &'a mut W<REG>

TCC1 Match/Compare 0 Trigger

pub fn tcc1_mc1(self) -> &'a mut W<REG>

TCC1 Match/Compare 1 Trigger

pub fn tcc2_ovf(self) -> &'a mut W<REG>

TCC2 Overflow Trigger

pub fn tcc2_mc0(self) -> &'a mut W<REG>

TCC2 Match/Compare 0 Trigger

pub fn tcc2_mc1(self) -> &'a mut W<REG>

TCC2 Match/Compare 1 Trigger

pub fn tc3_ovf(self) -> &'a mut W<REG>

TC3 Overflow Trigger

pub fn tc3_mc0(self) -> &'a mut W<REG>

TC3 Match/Compare 0 Trigger

pub fn tc3_mc1(self) -> &'a mut W<REG>

TC3 Match/Compare 1 Trigger

pub fn tc4_ovf(self) -> &'a mut W<REG>

TC4 Overflow Trigger

pub fn tc4_mc0(self) -> &'a mut W<REG>

TC4 Match/Compare 0 Trigger

pub fn tc4_mc1(self) -> &'a mut W<REG>

TC4 Match/Compare 1 Trigger

pub fn tc5_ovf(self) -> &'a mut W<REG>

TC5 Overflow Trigger

pub fn tc5_mc0(self) -> &'a mut W<REG>

TC5 Match/Compare 0 Trigger

pub fn tc5_mc1(self) -> &'a mut W<REG>

TC5 Match/Compare 1 Trigger

pub fn tc6_ovf(self) -> &'a mut W<REG>

TC6 Overflow Trigger

pub fn tc6_mc0(self) -> &'a mut W<REG>

TC6 Match/Compare 0 Trigger

pub fn tc6_mc1(self) -> &'a mut W<REG>

TC6 Match/Compare 1 Trigger

pub fn tc7_ovf(self) -> &'a mut W<REG>

TC7 Overflow Trigger

pub fn tc7_mc0(self) -> &'a mut W<REG>

TC7 Match/Compare 0 Trigger

pub fn tc7_mc1(self) -> &'a mut W<REG>

TC7 Match/Compare 1 Trigger

pub fn adc_resrdy(self) -> &'a mut W<REG>

ADC Result Ready Trigger

pub fn dac_empty(self) -> &'a mut W<REG>

DAC Empty Trigger

pub fn i2s_rx_0(self) -> &'a mut W<REG>

I2S RX 0 Trigger

pub fn i2s_rx_1(self) -> &'a mut W<REG>

I2S RX 1 Trigger

pub fn i2s_tx_0(self) -> &'a mut W<REG>

I2S TX 0 Trigger

pub fn i2s_tx_1(self) -> &'a mut W<REG>

I2S TX 1 Trigger

pub fn tcc3_ovf(self) -> &'a mut W<REG>

TCC3 Overflow Trigger

pub fn tcc3_mc0(self) -> &'a mut W<REG>

TCC3 Match/Compare 0 Trigger

pub fn tcc3_mc1(self) -> &'a mut W<REG>

TCC3 Match/Compare 1 Trigger

pub fn tcc3_mc2(self) -> &'a mut W<REG>

Match/Compare 2 Trigger

pub fn tcc3_mc3(self) -> &'a mut W<REG>

Match/Compare 3 Trigger