#[repr(u8)]pub enum TriggerSource {
Show 50 variants
Disable = 0,
Sercom0Rx = 1,
Sercom0Tx = 2,
Sercom1Rx = 3,
Sercom1Tx = 4,
Sercom2Rx = 5,
Sercom2Tx = 6,
Sercom3Rx = 7,
Sercom3Tx = 8,
Sercom4Rx = 9,
Sercom4Tx = 10,
Sercom5Rx = 11,
Sercom5Tx = 12,
Tcc0Ovf = 13,
Tcc0Mc0 = 14,
Tcc0Mc1 = 15,
Tcc0Mc2 = 16,
Tcc0Mc3 = 17,
Tcc1Ovf = 18,
Tcc1Mc0 = 19,
Tcc1Mc1 = 20,
Tcc2Ovf = 21,
Tcc2Mc0 = 22,
Tcc2Mc1 = 23,
Tc3Ovf = 24,
Tc3Mc0 = 25,
Tc3Mc1 = 26,
Tc4Ovf = 27,
Tc4Mc0 = 28,
Tc4Mc1 = 29,
Tc5Ovf = 30,
Tc5Mc0 = 31,
Tc5Mc1 = 32,
Tc6Ovf = 33,
Tc6Mc0 = 34,
Tc6Mc1 = 35,
Tc7Ovf = 36,
Tc7Mc0 = 37,
Tc7Mc1 = 38,
AdcResrdy = 39,
DacEmpty = 40,
I2sRx0 = 41,
I2sRx1 = 42,
I2sTx0 = 43,
I2sTx1 = 44,
Tcc3Ovf = 45,
Tcc3Mc0 = 46,
Tcc3Mc1 = 47,
Tcc3Mc2 = 48,
Tcc3Mc3 = 49,
}
Expand description
Trigger Source
Value on reset: 0
Variants§
Disable = 0
0: Only software/event triggers
Sercom0Rx = 1
1: SERCOM0 RX Trigger
Sercom0Tx = 2
2: SERCOM0 TX Trigger
Sercom1Rx = 3
3: SERCOM1 RX Trigger
Sercom1Tx = 4
4: SERCOM1 TX Trigger
Sercom2Rx = 5
5: SERCOM2 RX Trigger
Sercom2Tx = 6
6: SERCOM2 TX Trigger
Sercom3Rx = 7
7: SERCOM3 RX Trigger
Sercom3Tx = 8
8: SERCOM3 TX Trigger
Sercom4Rx = 9
9: SERCOM4 RX Trigger
Sercom4Tx = 10
10: SERCOM4 TX Trigger
Sercom5Rx = 11
11: SERCOM5 RX Trigger
Sercom5Tx = 12
12: SERCOM5 TX Trigger
Tcc0Ovf = 13
13: TCC0 Overflow Trigger
Tcc0Mc0 = 14
14: TCC0 Match/Compare 0 Trigger
Tcc0Mc1 = 15
15: TCC0 Match/Compare 1 Trigger
Tcc0Mc2 = 16
16: TCC0 Match/Compare 2 Trigger
Tcc0Mc3 = 17
17: TCC0 Match/Compare 3 Trigger
Tcc1Ovf = 18
18: TCC1 Overflow Trigger
Tcc1Mc0 = 19
19: TCC1 Match/Compare 0 Trigger
Tcc1Mc1 = 20
20: TCC1 Match/Compare 1 Trigger
Tcc2Ovf = 21
21: TCC2 Overflow Trigger
Tcc2Mc0 = 22
22: TCC2 Match/Compare 0 Trigger
Tcc2Mc1 = 23
23: TCC2 Match/Compare 1 Trigger
Tc3Ovf = 24
24: TC3 Overflow Trigger
Tc3Mc0 = 25
25: TC3 Match/Compare 0 Trigger
Tc3Mc1 = 26
26: TC3 Match/Compare 1 Trigger
Tc4Ovf = 27
27: TC4 Overflow Trigger
Tc4Mc0 = 28
28: TC4 Match/Compare 0 Trigger
Tc4Mc1 = 29
29: TC4 Match/Compare 1 Trigger
Tc5Ovf = 30
30: TC5 Overflow Trigger
Tc5Mc0 = 31
31: TC5 Match/Compare 0 Trigger
Tc5Mc1 = 32
32: TC5 Match/Compare 1 Trigger
Tc6Ovf = 33
33: TC6 Overflow Trigger
Tc6Mc0 = 34
34: TC6 Match/Compare 0 Trigger
Tc6Mc1 = 35
35: TC6 Match/Compare 1 Trigger
Tc7Ovf = 36
36: TC7 Overflow Trigger
Tc7Mc0 = 37
37: TC7 Match/Compare 0 Trigger
Tc7Mc1 = 38
38: TC7 Match/Compare 1 Trigger
AdcResrdy = 39
39: ADC Result Ready Trigger
DacEmpty = 40
40: DAC Empty Trigger
I2sRx0 = 41
41: I2S RX 0 Trigger
I2sRx1 = 42
42: I2S RX 1 Trigger
I2sTx0 = 43
43: I2S TX 0 Trigger
I2sTx1 = 44
44: I2S TX 1 Trigger
Tcc3Ovf = 45
45: TCC3 Overflow Trigger
Tcc3Mc0 = 46
46: TCC3 Match/Compare 0 Trigger
Tcc3Mc1 = 47
47: TCC3 Match/Compare 1 Trigger
Tcc3Mc2 = 48
48: Match/Compare 2 Trigger
Tcc3Mc3 = 49
49: Match/Compare 3 Trigger
Trait Implementations§
Source§impl Clone for Trigsrcselect
impl Clone for Trigsrcselect
Source§fn clone(&self) -> Trigsrcselect
fn clone(&self) -> Trigsrcselect
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
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