atsamd21g::gclk::clkctrl

Type Alias IdW

Source 
pub type IdW<'a, REG> = FieldWriter<'a, REG, 6, Idselect>;
Expand description

Field ID writer - Generic Clock Selection ID

Aliased Type§

struct IdW<'a, REG> { /* private fields */ }

Implementations§

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impl<'a, REG> IdW<'a, REG>
where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

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pub fn dfll48(self) -> &'a mut W<REG>

DFLL48

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pub fn fdpll(self) -> &'a mut W<REG>

FDPLL

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pub fn fdpll32k(self) -> &'a mut W<REG>

FDPLL32K

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pub fn wdt(self) -> &'a mut W<REG>

WDT

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pub fn rtc(self) -> &'a mut W<REG>

RTC

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pub fn eic(self) -> &'a mut W<REG>

EIC

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pub fn usb(self) -> &'a mut W<REG>

USB

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pub fn evsys_0(self) -> &'a mut W<REG>

EVSYS_0

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pub fn evsys_1(self) -> &'a mut W<REG>

EVSYS_1

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pub fn evsys_2(self) -> &'a mut W<REG>

EVSYS_2

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pub fn evsys_3(self) -> &'a mut W<REG>

EVSYS_3

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pub fn evsys_4(self) -> &'a mut W<REG>

EVSYS_4

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pub fn evsys_5(self) -> &'a mut W<REG>

EVSYS_5

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pub fn evsys_6(self) -> &'a mut W<REG>

EVSYS_6

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pub fn evsys_7(self) -> &'a mut W<REG>

EVSYS_7

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pub fn evsys_8(self) -> &'a mut W<REG>

EVSYS_8

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pub fn evsys_9(self) -> &'a mut W<REG>

EVSYS_9

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pub fn evsys_10(self) -> &'a mut W<REG>

EVSYS_10

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pub fn evsys_11(self) -> &'a mut W<REG>

EVSYS_11

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pub fn sercomx_slow(self) -> &'a mut W<REG>

SERCOMX_SLOW

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pub fn sercom0_core(self) -> &'a mut W<REG>

SERCOM0_CORE

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pub fn sercom1_core(self) -> &'a mut W<REG>

SERCOM1_CORE

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pub fn sercom2_core(self) -> &'a mut W<REG>

SERCOM2_CORE

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pub fn sercom3_core(self) -> &'a mut W<REG>

SERCOM3_CORE

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pub fn sercom4_core(self) -> &'a mut W<REG>

SERCOM4_CORE

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pub fn sercom5_core(self) -> &'a mut W<REG>

SERCOM5_CORE

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pub fn tcc0_tcc1(self) -> &'a mut W<REG>

TCC0_TCC1

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pub fn tcc2_tc3(self) -> &'a mut W<REG>

TCC2_TC3

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pub fn tc4_tc5(self) -> &'a mut W<REG>

TC4_TC5

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pub fn tc6_tc7(self) -> &'a mut W<REG>

TC6_TC7

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pub fn adc(self) -> &'a mut W<REG>

ADC

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pub fn ac_dig(self) -> &'a mut W<REG>

AC_DIG

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pub fn ac_ana(self) -> &'a mut W<REG>

AC_ANA

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pub fn dac(self) -> &'a mut W<REG>

DAC

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pub fn i2s_0(self) -> &'a mut W<REG>

I2S_0

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pub fn i2s_1(self) -> &'a mut W<REG>

I2S_1