atsamd21g::adc::inputctrl

Type Alias MuxposW

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pub type MuxposW<'a, REG> = FieldWriter<'a, REG, 5, Muxposselect>;
Expand description

Field MUXPOS writer - Positive Mux Input Selection

Aliased Type§

struct MuxposW<'a, REG> { /* private fields */ }

Implementations§

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impl<'a, REG> MuxposW<'a, REG>
where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

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pub fn pin0(self) -> &'a mut W<REG>

ADC AIN0 Pin

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pub fn pin1(self) -> &'a mut W<REG>

ADC AIN1 Pin

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pub fn pin2(self) -> &'a mut W<REG>

ADC AIN2 Pin

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pub fn pin3(self) -> &'a mut W<REG>

ADC AIN3 Pin

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pub fn pin4(self) -> &'a mut W<REG>

ADC AIN4 Pin

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pub fn pin5(self) -> &'a mut W<REG>

ADC AIN5 Pin

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pub fn pin6(self) -> &'a mut W<REG>

ADC AIN6 Pin

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pub fn pin7(self) -> &'a mut W<REG>

ADC AIN7 Pin

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pub fn pin8(self) -> &'a mut W<REG>

ADC AIN8 Pin

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pub fn pin9(self) -> &'a mut W<REG>

ADC AIN9 Pin

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pub fn pin10(self) -> &'a mut W<REG>

ADC AIN10 Pin

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pub fn pin11(self) -> &'a mut W<REG>

ADC AIN11 Pin

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pub fn pin12(self) -> &'a mut W<REG>

ADC AIN12 Pin

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pub fn pin13(self) -> &'a mut W<REG>

ADC AIN13 Pin

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pub fn pin14(self) -> &'a mut W<REG>

ADC AIN14 Pin

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pub fn pin15(self) -> &'a mut W<REG>

ADC AIN15 Pin

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pub fn pin16(self) -> &'a mut W<REG>

ADC AIN16 Pin

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pub fn pin17(self) -> &'a mut W<REG>

ADC AIN17 Pin

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pub fn pin18(self) -> &'a mut W<REG>

ADC AIN18 Pin

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pub fn pin19(self) -> &'a mut W<REG>

ADC AIN19 Pin

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pub fn temp(self) -> &'a mut W<REG>

Temperature Reference

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pub fn bandgap(self) -> &'a mut W<REG>

Bandgap Voltage

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pub fn scaledcorevcc(self) -> &'a mut W<REG>

1/4 Scaled Core Supply

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pub fn scalediovcc(self) -> &'a mut W<REG>

1/4 Scaled I/O Supply

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pub fn dac(self) -> &'a mut W<REG>

DAC Output