Type Alias TrigsrcW

pub type TrigsrcW<'a, REG> = FieldWriter<'a, REG, 5, Trigsrcselect>;

Field TRIGSRC writer - Trigger Source

Aliased Type

struct TrigsrcW<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> TrigsrcW<'a, REG>

where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

pub fn disable(self) -> &'a mut W<REG>

Only software/event triggers

pub fn sercom0_rx(self) -> &'a mut W<REG>

SERCOM0 RX Trigger

pub fn sercom0_tx(self) -> &'a mut W<REG>

SERCOM0 TX Trigger

pub fn sercom1_rx(self) -> &'a mut W<REG>

SERCOM1 RX Trigger

pub fn sercom1_tx(self) -> &'a mut W<REG>

SERCOM1 TX Trigger

pub fn sercom2_rx(self) -> &'a mut W<REG>

SERCOM2 RX Trigger

pub fn sercom2_tx(self) -> &'a mut W<REG>

SERCOM2 TX Trigger

pub fn tcc0_ovf(self) -> &'a mut W<REG>

TCC0 Overflow Trigger

pub fn tcc0_mc0(self) -> &'a mut W<REG>

TCC0 Match/Compare 0 Trigger

pub fn tcc0_mc1(self) -> &'a mut W<REG>

TCC0 Match/Compare 1 Trigger

pub fn tcc0_mc2(self) -> &'a mut W<REG>

TCC0 Match/Compare 2 Trigger

pub fn tcc0_mc3(self) -> &'a mut W<REG>

TCC0 Match/Compare 3 Trigger

pub fn tc1_ovf(self) -> &'a mut W<REG>

TC1 Overflow Trigger

pub fn tc1_mc0(self) -> &'a mut W<REG>

TC1 Match/Compare 0 Trigger

pub fn tc1_mc1(self) -> &'a mut W<REG>

TC1 Match/Compare 1 Trigger

pub fn tc2_ovf(self) -> &'a mut W<REG>

TC2 Overflow Trigger

pub fn tc2_mc0(self) -> &'a mut W<REG>

TC2 Match/Compare 0 Trigger

pub fn tc2_mc1(self) -> &'a mut W<REG>

TC2 Match/Compare 1 Trigger

pub fn adc_resrdy(self) -> &'a mut W<REG>

ADC Result Ready Trigger

pub fn dac_empty(self) -> &'a mut W<REG>

DAC Empty Trigger