Crate cortex_m

Expand description

Low level access to Cortex-M processors

This crate provides:

Access to core peripherals like NVIC, SCB and SysTick.
Access to core registers like CONTROL, MSP and PSR.
Interrupt manipulation mechanisms
Safe wrappers around Cortex-M specific instructions like bkpt

When this feature is enabled the implementation of all the functions inside the asm and register modules use inline assembly (asm!) instead of external assembly (FFI into separate assembly files pre-compiled using arm-none-eabi-gcc). The advantages of enabling inline-asm are:

Reduced overhead. FFI eliminates the possibility of inlining so all operations include a function call overhead when inline-asm is not enabled.
Some of the register API only becomes available only when inline-asm is enabled. Check the API docs for details.

The disadvantage is that inline-asm requires a Rust version at least 1.59 to use the asm!() macro. In the future 0.8 and above versions of cortex-m, this feature will always be enabled.

`cm7-r0p1`

This feature enables workarounds for errata found on Cortex-M7 chips with revision r0p1. Some functions in this crate only work correctly on those chips if this Cargo feature is enabled (the functions are documented accordingly).

`linker-plugin-lto`

This feature links against prebuilt assembly blobs that are compatible with Linker-Plugin LTO. This allows inlining assembly routines into the caller, even without the inline-asm feature, and works on stable Rust (but note the drawbacks below!).

If you want to use this feature, you need to be aware of a few things:

You need to make sure that -Clinker-plugin-lto is passed to rustc. Please refer to the Linker-Plugin LTO documentation for details.
You have to use a Rust version whose LLVM version is compatible with the toolchain in asm-toolchain.
Due to a Rust bug in compiler versions before 1.49, this option does not work with optimization levels s and z.