Struct atsamd51n::DCB

pub struct DCB { /* private fields */ }

Debug Control Block

Implementations

impl DCB

pub fn enable_trace(&mut self)

Enables TRACE. This is for example required by the peripheral::DWT cycle counter to work properly. As by STM documentation, this flag is not reset on soft-reset, only on power reset.

pub fn disable_trace(&mut self)

Disables TRACE. See DCB::enable_trace() for more details

pub fn is_debugger_attached() -> bool

Is there a debugger attached? (see note)

Note: This function is reported not to work on Cortex-M0 devices. Per the ARM v6-M Architecture Reference Manual, “Access to the DHCSR from software running on the processor is IMPLEMENTATION DEFINED”. Indeed, from the Cortex-M0+ r0p1 Technical Reference Manual, “Note Software cannot access the debug registers.”

impl DCB

pub const PTR: *const RegisterBlock = {0xe000edf0 as *const cortex_m::peripheral::dcb::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

👎Deprecated since 0.7.5: Use the associated constant PTR instead

Returns a pointer to the register block

Trait Implementations

impl Deref for DCB

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &<DCB as Deref>::Target

Dereferences the value.

impl Send for DCB