Struct atsamd_hal::clock::v2::Clocks

pub struct Clocks {
    pub pac: Pac,
    pub ahbs: AhbClks,
    pub apbs: ApbClks,
    pub gclk0: Enabled<Gclk0<DfllId>, U1>,
    pub dfll: Enabled<Dfll, U1>,
    pub osculp32k_base: Enabled<OscUlp32kBase>,
}

Enabled clocks at power-on reset

This type is constructed using the clock_system_at_reset function, which consumes the PAC-level clocking structs and returns the HAL-level clocking structs in their reset state.

This type represents the clocks as they are configured at power-on reset. The main clock, Gclk0, runs at 48 MHz using the Dfll in open-loop mode. The ultra-low power base oscillator is also enabled and running, as it can never be disabled.

As described in the top-level documentation for the clock module, only Enabled clocks can be used as a Source for downstream clocks. This struct contains all of the Enabled clocks at reset.

This struct also contains the Pac wrapper struct, which provides unsafe access to the low-level PAC structs.

Fields

pac: Pac

Wrapper providing unsafe access to low-level PAC structs

ahbs: AhbClks

Enabled AHB clocks

apbs: ApbClks

Enabled APB clocks

gclk0: Enabled<Gclk0<DfllId>, U1>

Main system clock, driven at 48 MHz by the DFLL in open loop mode

dfll: Enabled<Dfll, U1>

DFLL48 in open loop mode

osculp32k_base: Enabled<OscUlp32kBase>

Always-enabled base oscillator for the OscUlp1k and OscUlp32k clocks.