pub struct Aes { /* private fields */ }
Expand description

AES Peripheral

Encapsulates the PAC which acts as a token and provides an interface to the AES hardware

Implementations

Create the interface for the AES peripheral

Don’t forget to enable the APB bus for AES

AHB bus is on by default at reset

Clock::v1 mclk.apbcmask.modify(|_, w| w.aes_().set_bit());

Clock::v2 tokens.apbs.aes.enable();

Enable the AES peripheral

Disable the AES peripheral

Reset the AES controller

Destroy the AES peripheral and return the underlying AES register

Set AES Mode

Set Cipher Feedback Block Size (CFBS)

Set Encryption Key Size

Set Cipher Mode

Set Start Mode

Set Last Output Data (LOD) Mode

Start Last Key Generation

Compute last NK words of expanded key

XOR Key Generation

The user keyword gets XORed with the previous keyword register content

Counter Measure Type

Start Encryption/Decryption

New Message Used in cipher block chaining (CBC), cipher feedback (CFB) and output feedback (OFB), counter (CTR) modes to indicate that the hardware should use Initialization Vector for encrypting the first block of a message.

End of Message (GCM mode only)

This triggers generation of final GHASH value for the message

GF Multiplication (GCM mode only)

This triggers GF multiplication of data buffer content and hashkey register content.

Disable Encryption Complete Interrupt

Disable GF Multiplication Complete Interrupt

Enable Encryption Complete Interrupt

Enable GF Multiplication Complete Interrupt

Clear Encryption Complete Interrupt

Also automatically cleared if

  1. Manual encryption/decryption occurs (via CTRLB.START)
  2. Reading from GHASHx register

Clear GF Multiplication Complete Interrupt

Also automatically cleared if

  1. Manual encryption/decryption occurs (via CTRLB.START)
  2. Reading from data register INDATAx when LOD = 0
  3. Writing into the data register INDATAx when LOD = 1
  4. Reading from Hash Key register (HASHKEYx)

Read Encryption Complete Interrupt

Read GF Multiplication Complete Interrupt

Set the Data Buffer Pointer

Control if AES is active during debugging

Enable protected, only possible to change when AES is disabled

Set keyword / cryptographic key

Consists of four/six/eight Key Word registers for setting the cryptographic key

Set indata

Read indata

Set initialization vector

The four 32-bit Initialization Vector registers INTVECTVn set the 128-bit Initialization Vector data block that is used by some modes of operation as an additional initial input. INTVECTV0.INTVECTV corresponds to the first word of the Initialization Vector, INTVECTV3.INTVECTV to the last one.

These registers are write-only to prevent the Initialization Vector from being read by another application. For CBC, OFB, and CFB modes, the Initialization Vector corresponds to the initialization vector. For CTR mode, it corresponds to the counter value.

Set GCM hash key value (GCM mode only)

Set Galois Hash value (GCM mode only)

Writing a new key to keyword clears GHASH

Read Galois Hash value (GCM mode only)

Set cipher length (GCM mode only)

Read Cipher Length (GCM mode only)

Set a new seed for the AES random number generator

Auto Trait Implementations

Blanket Implementations

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The type returned in the event of a conversion error.
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Performs the conversion.