Struct atsamd21j::dmac::RegisterBlock

source · [−]
#[repr(C)]
pub struct RegisterBlock {
Show 23 fields
    pub ctrl: Reg<CTRL_SPEC>,
    pub crcctrl: Reg<CRCCTRL_SPEC>,
    pub crcdatain: Reg<CRCDATAIN_SPEC>,
    pub crcchksum: Reg<CRCCHKSUM_SPEC>,
    pub crcstatus: Reg<CRCSTATUS_SPEC>,
    pub dbgctrl: Reg<DBGCTRL_SPEC>,
    pub qosctrl: Reg<QOSCTRL_SPEC>,
    pub swtrigctrl: Reg<SWTRIGCTRL_SPEC>,
    pub prictrl0: Reg<PRICTRL0_SPEC>,
    pub intpend: Reg<INTPEND_SPEC>,
    pub intstatus: Reg<INTSTATUS_SPEC>,
    pub busych: Reg<BUSYCH_SPEC>,
    pub pendch: Reg<PENDCH_SPEC>,
    pub active: Reg<ACTIVE_SPEC>,
    pub baseaddr: Reg<BASEADDR_SPEC>,
    pub wrbaddr: Reg<WRBADDR_SPEC>,
    pub chid: Reg<CHID_SPEC>,
    pub chctrla: Reg<CHCTRLA_SPEC>,
    pub chctrlb: Reg<CHCTRLB_SPEC>,
    pub chintenclr: Reg<CHINTENCLR_SPEC>,
    pub chintenset: Reg<CHINTENSET_SPEC>,
    pub chintflag: Reg<CHINTFLAG_SPEC>,
    pub chstatus: Reg<CHSTATUS_SPEC>,
    /* private fields */

}
Expand description

Register block

Fields

ctrl: Reg<CTRL_SPEC>

0x00 - Control

crcctrl: Reg<CRCCTRL_SPEC>

0x02 - CRC Control

crcdatain: Reg<CRCDATAIN_SPEC>

0x04 - CRC Data Input

crcchksum: Reg<CRCCHKSUM_SPEC>

0x08 - CRC Checksum

crcstatus: Reg<CRCSTATUS_SPEC>

0x0c - CRC Status

dbgctrl: Reg<DBGCTRL_SPEC>

0x0d - Debug Control

qosctrl: Reg<QOSCTRL_SPEC>

0x0e - QOS Control

swtrigctrl: Reg<SWTRIGCTRL_SPEC>

0x10 - Software Trigger Control

prictrl0: Reg<PRICTRL0_SPEC>

0x14 - Priority Control 0

intpend: Reg<INTPEND_SPEC>

0x20 - Interrupt Pending

intstatus: Reg<INTSTATUS_SPEC>

0x24 - Interrupt Status

busych: Reg<BUSYCH_SPEC>

0x28 - Busy Channels

pendch: Reg<PENDCH_SPEC>

0x2c - Pending Channels

active: Reg<ACTIVE_SPEC>

0x30 - Active Channel and Levels

baseaddr: Reg<BASEADDR_SPEC>

0x34 - Descriptor Memory Section Base Address

wrbaddr: Reg<WRBADDR_SPEC>

0x38 - Write-Back Memory Section Base Address

chid: Reg<CHID_SPEC>

0x3f - Channel ID

chctrla: Reg<CHCTRLA_SPEC>

0x40 - Channel Control A

chctrlb: Reg<CHCTRLB_SPEC>

0x44 - Channel Control B

chintenclr: Reg<CHINTENCLR_SPEC>

0x4c - Channel Interrupt Enable Clear

chintenset: Reg<CHINTENSET_SPEC>

0x4d - Channel Interrupt Enable Set

chintflag: Reg<CHINTFLAG_SPEC>

0x4e - Channel Interrupt Flag Status and Clear

chstatus: Reg<CHSTATUS_SPEC>

0x4f - Channel Status

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