Enum atsamd21j::dmac::chctrlb::TRIGSRC_A

#[repr(u8)]
pub enum TRIGSRC_A {
    DISABLE,
    SERCOM0_RX,
    SERCOM0_TX,
    SERCOM1_RX,
    SERCOM1_TX,
    SERCOM2_RX,
    SERCOM2_TX,
    SERCOM3_RX,
    SERCOM3_TX,
    SERCOM4_RX,
    SERCOM4_TX,
    SERCOM5_RX,
    SERCOM5_TX,
    TCC0_OVF,
    TCC0_MC0,
    TCC0_MC1,
    TCC0_MC2,
    TCC0_MC3,
    TCC1_OVF,
    TCC1_MC0,
    TCC1_MC1,
    TCC2_OVF,
    TCC2_MC0,
    TCC2_MC1,
    TC3_OVF,
    TC3_MC0,
    TC3_MC1,
    TC4_OVF,
    TC4_MC0,
    TC4_MC1,
    TC5_OVF,
    TC5_MC0,
    TC5_MC1,
    TC6_OVF,
    TC6_MC0,
    TC6_MC1,
    TC7_OVF,
    TC7_MC0,
    TC7_MC1,
    ADC_RESRDY,
    DAC_EMPTY,
    I2S_RX_0,
    I2S_RX_1,
    I2S_TX_0,
    I2S_TX_1,
    TCC3_OVF,
    TCC3_MC0,
    TCC3_MC1,
    TCC3_MC2,
    TCC3_MC3,
}

Trigger Source

Value on reset: 0

Variants

DISABLE

0: Only software/event triggers

SERCOM0_RX

1: SERCOM0 RX Trigger

SERCOM0_TX

2: SERCOM0 TX Trigger

SERCOM1_RX

3: SERCOM1 RX Trigger

SERCOM1_TX

4: SERCOM1 TX Trigger

SERCOM2_RX

5: SERCOM2 RX Trigger

SERCOM2_TX

6: SERCOM2 TX Trigger

SERCOM3_RX

7: SERCOM3 RX Trigger

SERCOM3_TX

8: SERCOM3 TX Trigger

SERCOM4_RX

9: SERCOM4 RX Trigger

SERCOM4_TX

10: SERCOM4 TX Trigger

SERCOM5_RX

11: SERCOM5 RX Trigger

SERCOM5_TX

12: SERCOM5 TX Trigger

TCC0_OVF

13: TCC0 Overflow Trigger

TCC0_MC0

14: TCC0 Match/Compare 0 Trigger

TCC0_MC1

15: TCC0 Match/Compare 1 Trigger

TCC0_MC2

16: TCC0 Match/Compare 2 Trigger

TCC0_MC3

17: TCC0 Match/Compare 3 Trigger

TCC1_OVF

18: TCC1 Overflow Trigger

TCC1_MC0

19: TCC1 Match/Compare 0 Trigger

TCC1_MC1

20: TCC1 Match/Compare 1 Trigger

TCC2_OVF

21: TCC2 Overflow Trigger

TCC2_MC0

22: TCC2 Match/Compare 0 Trigger

TCC2_MC1

23: TCC2 Match/Compare 1 Trigger

TC3_OVF

24: TC3 Overflow Trigger

TC3_MC0

25: TC3 Match/Compare 0 Trigger

TC3_MC1

26: TC3 Match/Compare 1 Trigger

TC4_OVF

27: TC4 Overflow Trigger

TC4_MC0

28: TC4 Match/Compare 0 Trigger

TC4_MC1

29: TC4 Match/Compare 1 Trigger

TC5_OVF

30: TC5 Overflow Trigger

TC5_MC0

31: TC5 Match/Compare 0 Trigger

TC5_MC1

32: TC5 Match/Compare 1 Trigger

TC6_OVF

33: TC6 Overflow Trigger

TC6_MC0

34: TC6 Match/Compare 0 Trigger

TC6_MC1

35: TC6 Match/Compare 1 Trigger

TC7_OVF

36: TC7 Overflow Trigger

TC7_MC0

37: TC7 Match/Compare 0 Trigger

TC7_MC1

38: TC7 Match/Compare 1 Trigger

ADC_RESRDY

39: ADC Result Ready Trigger

DAC_EMPTY

40: DAC Empty Trigger

I2S_RX_0

41: I2S RX 0 Trigger

I2S_RX_1

42: I2S RX 1 Trigger

I2S_TX_0

43: I2S TX 0 Trigger

I2S_TX_1

44: I2S TX 1 Trigger

TCC3_OVF

45: TCC3 Overflow Trigger

TCC3_MC0

46: TCC3 Match/Compare 0 Trigger

TCC3_MC1

47: TCC3 Match/Compare 1 Trigger

TCC3_MC2

48: Match/Compare 2 Trigger

TCC3_MC3

49: Match/Compare 3 Trigger

Trait Implementations

impl Clone for TRIGSRC_A

fn clone(&self) -> TRIGSRC_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for TRIGSRC_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<TRIGSRC_A> for u8

fn from(variant: TRIGSRC_A) -> Self

Converts to this type from the input type.

impl PartialEq<TRIGSRC_A> for TRIGSRC_A

fn eq(&self, other: &TRIGSRC_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for TRIGSRC_A

impl StructuralPartialEq for TRIGSRC_A