Struct Uart

pub struct Uart<C, D, RxDma = NoneT, TxDma = NoneT>
where
    C: ValidConfig,
    D: Capability,
{ /* private fields */ }

Abstraction over a UART peripheral, allowing to perform UART transactions. The second type parameter, D, denotes what the struct’s Capability is.

• Rx or RxDuplex: Can perform receive transactions
• Tx or TxDuplex: Can perform transmit transactions
• Duplex: Can perform receive and transmit transactions. Additionally, you can call split to return a (Uart<C, RxDuplex>, Uart<C, TxDuplex>) tuple.

Implementations

impl<C, D, S> Uart<C, D, NoneT, NoneT>

where C: ValidConfig<Sercom = S>, D: SingleOwner, S: Sercom,

pub fn into_future<I>(self, _interrupts: I) -> UartFuture<C, D>

where I: Binding<S::Interrupt, InterruptHandler<S>>,

Turn a Uart into a UartFuture. This method is only available for Uarts which have a Tx, Rx or Duplex Capability.

impl<C, D, R, T> Uart<C, D, R, T>

where C: ValidConfig, D: Capability,

pub fn read_flags(&self) -> Flags

Read the interrupt flags

pub fn clear_flags(&mut self, flags: Flags)

Clear interrupt status flags

Setting the ERROR, RXBRK, CTSIC, RXS, or TXC flag will clear the interrupts. This function has no effect on the DRE or RXC flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED.

• Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
• Available flags for Transmit capability: DRE and TXC. Note: The CTSIC flag can only be cleared if a CTS Pad was specified in the Config via the clear_ctsic method.
• Since Duplex Uarts are Receive + Transmit they have all flags available.

Warning: The implementations of of Write::flush waits on and clears the TXC flag. Manually clearing this flag could cause it to hang indefinitely.

pub fn enable_interrupts(&mut self, flags: Flags)

Enable interrupts for the specified flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED.

• Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
• Available flags for Transmit capability: DRE and TXC. Note: The CTSIC interrupt can only be enabled if a CTS Pad was specified in the Config via the enable_ctsic method.
• Since Duplex Uarts are Receive + Transmit they have all flags available.

pub fn disable_interrupts(&mut self, flags: Flags)

Disable interrupts for the specified flags.

Note that only the flags pertinent to Self’s Capability will be cleared. The other flags will be SILENTLY IGNORED

• Available flags for Receive capability: RXC, RXS, RXBRK and ERROR
• Available flags for Transmit capability: DRE and TXC. Note: The CTSIC interrupt can only be disabled if a CTS Pad was specified in the Config via the disable_ctsic method.
• Since Duplex Uarts are Receive + Transmit they have all flags available.

pub fn read_status(&self) -> Status

Read the status flags

pub fn clear_status(&mut self, status: Status)

Clear the status flags

Note that only the status flags pertinent to Self’s Capability will be cleared. The other stattus flags will be SILENTLY IGNORED.

• Available status flags for Receive capability: PERR, FERR, BUFOVF, ISF and COLL
• Transmit-only Uarts have no clearable status flags.
• Since Duplex Uarts are Receive + Transmit they have all status flags available.

impl<C, D, R, T> Uart<C, D, R, T>

where C: ValidConfig, <C::Pads as PadSet>::Cts: SomePad, D: Transmit,

pub fn clear_ctsic(&mut self)

Clear the CTSIC interrupt flag

pub fn enable_ctsic(&mut self)

Enable the CTSIC interrupt

pub fn disable_ctsic(&mut self)

Disable the CTSIC interrupt

impl<C, D, R, T> Uart<C, D, R, T>

where C: ValidConfig, D: Simplex,

pub fn disable(self) -> C

Disable the UART peripheral and return the underlying Config

pub fn reconfigure<U>(&mut self, update: U)

where U: FnOnce(&mut SpecificConfig<C>),

Reconfigure the UART.

Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.

use atsamd_hal::sercom::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));

impl<C, D, T> Uart<C, D, NoneT, T>

where C: ValidConfig, D: Capability,

pub fn with_rx_channel<R: AnyChannel<Status = Ready>>( self, rx_channel: R, ) -> Uart<C, D, R, T>

Attach a DMA channel to this Uart for RX transactions. Its Read implementation will use DMA to carry out its transactions.

impl<C, D, R> Uart<C, D, R, NoneT>

where C: ValidConfig, D: Capability,

pub fn with_tx_channel<T: AnyChannel<Status = Ready>>( self, tx_channel: T, ) -> Uart<C, D, R, T>

Attach a DMA channel to this Uart for TX transactions. Its Write implementation will use DMA to carry out its transactions.

impl<C, D, R, T, S> Uart<C, D, R, T>

where C: ValidConfig, D: Capability, R: AnyChannel<Status = S>, S: ReadyChannel,

pub fn take_rx_channel(self) -> (Uart<C, D, NoneT, T>, R)

Reclaim the RX DMA channel. Subsequent RX operations will no longer use DMA.

impl<C, D, R, T, S> Uart<C, D, R, T>

where C: ValidConfig, D: Capability, T: AnyChannel<Status = S>, S: ReadyChannel,

pub fn take_tx_channel(self) -> (Uart<C, D, R, NoneT>, T)

Reclaim the TX DMA channel. Subsequent TX operations will no longer use DMA.

impl<C, R, T> Uart<C, Duplex, R, T>

where C: ValidConfig,

pub fn split(self) -> (Uart<C, RxDuplex, R, NoneT>, Uart<C, TxDuplex, NoneT, T>)

Split the Uart into RxDuplex and TxDuplex halves

pub fn disable(self) -> C

Disable the UART peripheral and return the underlying Config

pub fn reconfigure<F>(&mut self, update: F)

where F: FnOnce(&mut SpecificConfig<C>),

Update the UART Configuration.

Calling this method will temporarily disable the SERCOM peripheral, as some registers are enable-protected. This may interrupt any ongoing transactions.

use atsamd_hal::sercom::uart::{BaudMode, Oversampling, Uart};
uart.reconfigure(|c| c.set_run_in_standby(false));

pub fn join( rx: Uart<C, RxDuplex, R, NoneT>, tx: Uart<C, TxDuplex, NoneT, T>, ) -> Self

Join RxDuplex and TxDuplex halves back into a full Uart<C, Duplex>

impl<C, D, R, T> Uart<C, D, R, T>

where C: ValidConfig, D: Receive, DataReg: AsPrimitive<C::Word>,

pub unsafe fn read_data(&mut self) -> DataReg

Read from the DATA register

Safety

Reading from the data register directly is unsafe, because it will clear the RXC flag, which could break assumptions made elsewhere in this module.

pub fn flush_rx_buffer(&mut self)

Flush the RX buffer and clear RX errors.

Note: The datasheet states that disabling the receiver (RXEN) clears the RX buffer, and clears the BUFOVF, PERR and FERR bits. However, in practice, it seems like BUFOVF errors still pop up after a disable/enable cycle of the receiver, then immediately begin reading bytes from the DATA register. Instead, this method uses a workaround, which reads a few bytes to clear the RX buffer (3 bytes seems to be the trick), then manually clear the error bits.

impl<C, D, R, T> Uart<C, D, R, T>

where C: ValidConfig, D: Transmit,

pub unsafe fn write_data(&mut self, data: DataReg)

Write to the DATA register

Safety

Writing to the data register directly is unsafe, because it will clear the DRE flag, which could break assumptions made elsewhere in this module.

impl<C, D> Uart<C, D>

where Self: Buffer<Beat = C::Word>, C: ValidConfig, D: Receive,

pub fn receive_with_dma<Ch, B>( self, buf: B, channel: Ch, ) -> Transfer<Channel<Ch::Id, Busy>, BufferPair<Self, B>>

where Ch: AnyChannel<Status = Ready>, B: Buffer<Beat = C::Word> + 'static,

Transform an Uart into a DMA Transfer) and start reveiving into the provided buffer.

In order to be (safely) non-blocking, his method has to take a 'static buffer. If you’d rather use DMA with the blocking embedded_io::Read trait, and avoid having to use static buffers, useUart::with_rx_channel instead.

impl<C, D> Uart<C, D>

where Self: Buffer<Beat = C::Word>, C: ValidConfig, D: Transmit,

pub fn send_with_dma<Ch, B>( self, buf: B, channel: Ch, ) -> Transfer<Channel<Ch::Id, Busy>, BufferPair<B, Self>>

where Ch: AnyChannel<Status = Ready>, B: Buffer<Beat = C::Word> + 'static,

Transform an Uart into a DMA Transfer) and start sending the provided buffer.

In order to be (safely) non-blocking, his method takes a 'static buffer. If you’d rather use DMA with the blocking embedded_io::Write trait, and avoid having to use static buffers, useUart::with_tx_channel instead.

Trait Implementations

impl<C, D, R, T, S> AsMut<Uart<C, D, R, T>> for UartFuture<C, D, R, T>

where C: ValidConfig<Sercom = S>, D: Capability, S: Sercom,

fn as_mut(&mut self) -> &mut Uart<C, D, R, T>

Converts this type into a mutable reference of the (usually inferred) input type.

impl<C: ValidConfig, R, T> AsMut<Uart<C, Duplex, R, T>> for (&mut Uart<C, RxDuplex, R, NoneT>, &mut Uart<C, TxDuplex, NoneT, T>)

fn as_mut(&mut self) -> &mut Uart<C, Duplex, R, T>

Converts this type into a mutable reference of the (usually inferred) input type.

impl<C, D> AsRef<Config<<C as AnyConfig>::Pads, <C as AnyConfig>::CharSize>> for Uart<C, D>

where C: ValidConfig, D: Capability,

fn as_ref(&self) -> &SpecificConfig<C>

Converts this type into a shared reference of the (usually inferred) input type.

impl<C, D, R, T, S> AsRef<Uart<C, D, R, T>> for UartFuture<C, D, R, T>

where C: ValidConfig<Sercom = S>, D: Capability, S: Sercom,

fn as_ref(&self) -> &Uart<C, D, R, T>

Converts this type into a shared reference of the (usually inferred) input type.

impl<C, D> Buffer for Uart<C, D>

where C: ValidConfig, C::Word: Beat, D: Capability,

type Beat = <C as AnyConfig>::Word

DMAC beat size

fn dma_ptr(&mut self) -> *mut Self::Beat

Pointer to the buffer. If the buffer is incrementing, the address should point to one past the last beat transfer in the block.

fn incrementing(&self) -> bool

Return whether the buffer pointer should be incrementing or not

fn buffer_len(&self) -> usize

Buffer length in beats

impl<C, D, R, T> ErrorType for Uart<C, D, R, T>

where C: ValidConfig, D: Capability,

type Error = Error

Error type of all the IO operations on this type.

impl<C, D, R, T, W> ErrorType for Uart<C, D, R, T>

where C: ValidConfig<Word = W>, W: Copy, D: Capability,

type Error = Error

Error type

impl<C, D, R, T> Read<<C as AnyConfig>::Word> for Uart<C, D, R, T>

where C: ValidConfig, D: Receive, DataReg: AsPrimitive<C::Word>,

fn read(&mut self) -> Result<C::Word, Self::Error>

Reads a single word from the serial interface

impl<P, D, T> Read for Uart<Config<P, EightBit>, D, NoneT, T>

where P: ValidPads, D: Receive,

fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<P, D, R, T, S> Read for Uart<Config<P, EightBit>, D, R, T>

where P: ValidPads<Sercom = S>, D: Receive, R: AnyChannel<Status = Ready>, S: Sercom,

fn read(&mut self, buffer: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<C, D, R, T> Write<<C as AnyConfig>::Word> for Uart<C, D, R, T>

where C: ValidConfig, D: Transmit,

fn write(&mut self, word: C::Word) -> Result<(), Self::Error>

Wait for a DRE flag, then write a word

fn flush(&mut self) -> Result<(), Self::Error>

Wait for a TXC flag

impl<P, D, R> Write for Uart<Config<P, EightBit>, D, R, NoneT>

where P: ValidPads, D: Transmit,

fn flush(&mut self) -> Result<(), Self::Error>

Wait for a TXC flag

fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error>

Write a buffer into this writer, returning how many bytes were written.

fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::Error>

Write an entire buffer into this writer.

fn write_fmt( &mut self, fmt: Arguments<'_>, ) -> Result<(), WriteFmtError<Self::Error>>

Write a formatted string into this writer, returning any error encountered.

impl<P, D, R, T, S> Write for Uart<Config<P, EightBit>, D, R, T>

where P: ValidPads<Sercom = S>, D: Transmit, T: AnyChannel<Status = Ready>, S: Sercom,

fn flush(&mut self) -> Result<(), Self::Error>

Wait for a TXC flag

fn write(&mut self, bytes: &[u8]) -> Result<usize, Self::Error>

Write a buffer into this writer, returning how many bytes were written.

fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::Error>

Write an entire buffer into this writer.

fn write_fmt( &mut self, fmt: Arguments<'_>, ) -> Result<(), WriteFmtError<Self::Error>>

Write a formatted string into this writer, returning any error encountered.

impl<C, D> Read<<C as AnyConfig>::Word> for Uart<C, D>

where C: ValidConfig, D: Receive, DataReg: AsPrimitive<C::Word>,

fn read(&mut self) -> Result<C::Word, Error>

Wait for an RXC flag, then read the word

type Error = Error

Read error

impl<C, D> Write<<C as AnyConfig>::Word> for Uart<C, D>

where C: ValidConfig, D: Transmit,

fn write(&mut self, word: C::Word) -> Result<(), Self::Error>

Wait for a DRE flag, then write a word

fn flush(&mut self) -> Result<(), Self::Error>

Wait for a TXC flag

type Error = Error

Write error

impl<C, D> Default<<C as AnyConfig>::Word> for Uart<C, D>

where C: ValidConfig, D: Transmit, Uart<C, D>: Write<C::Word>,