atsamd21g::i2s::clkctrl

Type Alias W

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pub type W = W<ClkctrlSpec>;
Expand description

Register CLKCTRL%s writer

Aliased Type§

struct W { /* private fields */ }

Implementations§

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impl W

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pub fn slotsize(&mut self) -> SlotsizeW<'_, ClkctrlSpec>

Bits 0:1 - Slot Size

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pub fn nbslots(&mut self) -> NbslotsW<'_, ClkctrlSpec>

Bits 2:4 - Number of Slots in Frame

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pub fn fswidth(&mut self) -> FswidthW<'_, ClkctrlSpec>

Bits 5:6 - Frame Sync Width

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pub fn bitdelay(&mut self) -> BitdelayW<'_, ClkctrlSpec>

Bit 7 - Data Delay from Frame Sync

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pub fn fssel(&mut self) -> FsselW<'_, ClkctrlSpec>

Bit 8 - Frame Sync Select

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pub fn fsinv(&mut self) -> FsinvW<'_, ClkctrlSpec>

Bit 11 - Frame Sync Invert

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pub fn scksel(&mut self) -> SckselW<'_, ClkctrlSpec>

Bit 12 - Serial Clock Select

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pub fn mcksel(&mut self) -> MckselW<'_, ClkctrlSpec>

Bit 16 - Master Clock Select

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pub fn mcken(&mut self) -> MckenW<'_, ClkctrlSpec>

Bit 18 - Master Clock Enable

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pub fn mckdiv(&mut self) -> MckdivW<'_, ClkctrlSpec>

Bits 19:23 - Master Clock Division Factor

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pub fn mckoutdiv(&mut self) -> MckoutdivW<'_, ClkctrlSpec>

Bits 24:28 - Master Clock Output Division Factor

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pub fn fsoutinv(&mut self) -> FsoutinvW<'_, ClkctrlSpec>

Bit 29 - Frame Sync Output Invert

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pub fn sckoutinv(&mut self) -> SckoutinvW<'_, ClkctrlSpec>

Bit 30 - Serial Clock Output Invert

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pub fn mckoutinv(&mut self) -> MckoutinvW<'_, ClkctrlSpec>

Bit 31 - Master Clock Output Invert