Struct SpiFuture

pub struct SpiFuture<C, A, R = NoneT, T = NoneT>
where
    C: ValidConfig,
    A: Capability,
{ /* private fields */ }

async version of Spi.

Create this struct by calling Spi::into_future.

Implementations

impl<C, D, RxDma, TxDma> SpiFuture<C, D, RxDma, TxDma>

where C: ValidConfig, D: Capability, RxDma: AnyChannel<Status = ReadyFuture>, TxDma: AnyChannel<Status = ReadyFuture>,

pub fn take_dma_channels(self) -> (SpiFuture<C, D, NoneT, NoneT>, RxDma, TxDma)

Reclaim the DMA channels. Any subsequent SPI transaction will not use DMA.

impl<C, D, R, T> SpiFuture<C, D, R, T>

where C: ValidConfig, D: Receive, R: AnyChannel<Status = ReadyFuture>,

pub fn take_rx_channel(self) -> (SpiFuture<C, D, NoneT, T>, R)

Reclaim the Rx DMA channel. Any subsequent SPI transaction will not use DMA.

impl<C, D, R, T> SpiFuture<C, D, R, T>

where C: ValidConfig, D: Capability, T: AnyChannel<Status = ReadyFuture>,

pub fn take_tx_channel(self) -> (SpiFuture<C, D, R, NoneT>, T)

Reclaim the DMA channel. Any subsequent SPI transaction will not use DMA.

impl<C, S, R> SpiFuture<C, Rx, R, NoneT>

where C: ValidConfig<Sercom = S>, C::Word: PrimInt + AsPrimitive<DataWidth>, DataWidth: AsPrimitive<C::Word>, S: Sercom,

pub fn with_rx_dma_channel<Chan: AnyChannel<Status = ReadyFuture>>( self, rx_channel: Chan, ) -> SpiFuture<C, Rx, Chan, NoneT>

Add a DMA channel for receiving transactions

impl<C, S, T> SpiFuture<C, Tx, NoneT, T>

where C: ValidConfig<Sercom = S>, C::Word: PrimInt + AsPrimitive<DataWidth>, DataWidth: AsPrimitive<C::Word>, S: Sercom,

pub fn with_tx_dma_channel<Chan: AnyChannel<Status = ReadyFuture>>( self, tx_channel: Chan, ) -> SpiFuture<C, Tx, NoneT, Chan>

Add a DMA channel for receiving transactions

impl<C, S, R, T> SpiFuture<C, Duplex, R, T>

where C: ValidConfig<Sercom = S>, C::Word: PrimInt + AsPrimitive<DataWidth>, DataWidth: AsPrimitive<C::Word>, S: Sercom,

pub fn with_dma_channels<ChanRx, ChanTx>( self, rx_channel: ChanRx, tx_channel: ChanTx, ) -> SpiFuture<C, Duplex, ChanRx, ChanTx>

where ChanRx: AnyChannel<Status = ReadyFuture>, ChanTx: AnyChannel<Status = ReadyFuture>,

Add a DMA channel for receiving transactions

impl<P, M, Z, D, R, T, S> SpiFuture<Config<P, M, Z>, D, R, T>

where P: ValidPads, M: OpMode, Z: Size + 'static, Config<P, M, Z>: ValidConfig<Sercom = S>, D: Transmit, S: Sercom, Z::Word: PrimInt + AsPrimitive<DataWidth> + Beat, DataWidth: AsPrimitive<Z::Word>, T: AnyChannel<Status = ReadyFuture>,

pub async fn write_dma(&mut self, words: &[Z::Word]) -> Result<usize, Error>

Write words from a buffer asynchronously, using DMA.

impl<P, M, S, C, D, R, T> SpiFuture<Config<P, M, C>, D, R, T>

where Config<P, M, C>: ValidConfig<Sercom = S>, S: Sercom, P: ValidPads, M: MasterMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth> + Beat, D: Capability, DataWidth: AsPrimitive<C::Word>, R: AnyChannel<Status = ReadyFuture>, T: AnyChannel<Status = ReadyFuture>,

pub async fn read_dma_master( &mut self, words: &mut [C::Word], ) -> Result<(), Error>

Read words into a buffer asynchronously, using DMA.

impl<C, D> SpiFuture<C, D, NoneT, NoneT>

where C: ValidConfig, D: Capability,

pub fn free(self) -> Spi<C, D>

Return the underlying Spi.

impl<P, M, C, D, R, S> SpiFuture<Config<P, M, C>, D, R, NoneT>

where Config<P, M, C>: ValidConfig<Sercom = S>, P: ValidPads, M: OpMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth>, D: Transmit, DataWidth: AsPrimitive<C::Word>, S: Sercom,

pub async fn write(&mut self, words: &[C::Word]) -> Result<(), Error>

Write words from a buffer asynchronously, word by word

impl<P, M, C, D, T, S> SpiFuture<Config<P, M, C>, D, NoneT, T>

where Config<P, M, C>: ValidConfig<Sercom = S>, P: ValidPads, M: MasterMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth>, D: Receive, DataWidth: AsPrimitive<C::Word>, S: Sercom,

pub async fn read(&mut self, buffer: &mut [C::Word]) -> Result<(), Error>

Read words into a buffer asynchronously, word by word.

Since we are using a Duplex SpiFuture, we need to send a word simultaneously while receiving one. This no-op word is configurable via the nop_word method.

impl<P, M, C, S, D, R, T> SpiFuture<Config<P, M, C>, D, R, T>

where Config<P, M, C>: ValidConfig<Sercom = S>, P: ValidPads, M: OpMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth>, DataWidth: AsPrimitive<C::Word>, D: Capability, S: Sercom,

pub async fn transfer_word_in_place( &mut self, to_send: C::Word, ) -> Result<C::Word, Error>

Read and write a single word to the bus simultaneously.

Trait Implementations

impl<C, A, R, T> AsMut<Spi<C, A, R, T>> for SpiFuture<C, A, R, T>

where C: ValidConfig, A: Capability,

fn as_mut(&mut self) -> &mut Spi<C, A, R, T>

Converts this type into a mutable reference of the (usually inferred) input type.

impl<C, A, R, T> AsRef<Spi<C, A, R, T>> for SpiFuture<C, A, R, T>

where C: ValidConfig, A: Capability,

fn as_ref(&self) -> &Spi<C, A, R, T>

Converts this type into a shared reference of the (usually inferred) input type.

impl<C, A, R, T> ErrorType for SpiFuture<C, A, R, T>

where C: ValidConfig, A: Capability,

type Error = Error

Error type.

impl<C, A, R, T> ErrorType for SpiFuture<C, A, R, T>

where C: ValidConfig, A: Capability,

type Error = Error

Error type of all the IO operations on this type.

impl<C, A, R, T> Format for SpiFuture<C, A, R, T>

where C: ValidConfig, A: Capability,

fn format(&self, f: Formatter<'_>)

Writes the defmt representation of self to fmt.

impl<P, M, Z, D, T, S> Read for SpiFuture<Config<P, M, Z>, D, NoneT, T>

where P: ValidPads, M: MasterMode, Z: Size<Word = u8> + 'static, Config<P, M, Z>: ValidConfig<Sercom = S>, D: Receive, S: Sercom,

embedded_io::Read implementation for Receive SpiFutures in MasterMode.

async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

async fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<P, M, Z, D, R, T, S> Read for SpiFuture<Config<P, M, Z>, D, R, T>

where P: ValidPads, M: MasterMode, Z: Size<Word = u8> + 'static, Config<P, M, Z>: ValidConfig<Sercom = S>, D: Receive, S: Sercom, R: AnyChannel<Status = ReadyFuture>, T: AnyChannel<Status = ReadyFuture>,

embedded_io::Read implementation for Receive SpiFutures in MasterMode, using DMA transfers.

async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

async fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<P, Z, D, T, S> Read for SpiFuture<Config<P, Slave, Z>, D, NoneT, T>

where P: ValidPads, Z: Size<Word = u8> + 'static, Config<P, Slave, Z>: ValidConfig<Sercom = S>, D: Receive, S: Sercom,

embedded_io::Read implementation for Receive SpiFutures in Slave mode.

async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

async fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<P, Z, D, R, T, S> Read for SpiFuture<Config<P, Slave, Z>, D, R, T>

where P: ValidPads, Z: Size<Word = u8> + 'static, Config<P, Slave, Z>: ValidConfig<Sercom = S>, D: Receive, S: Sercom, R: AnyChannel<Status = ReadyFuture>,

embedded_io::Read implementation for Receive SpiFutures in Slave mode, using DMA transfers.

async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

async fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<P, M, C, S> SpiBus<<C as CharSize>::Word> for SpiFuture<Config<P, M, C>, Duplex>

where Config<P, M, C>: ValidConfig<Sercom = S>, P: ValidPads, M: MasterMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth>, DataWidth: AsPrimitive<C::Word>, S: Sercom,

async fn read(&mut self, words: &mut [C::Word]) -> Result<(), Self::Error>

Read words from the slave.

async fn write(&mut self, words: &[C::Word]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

async fn transfer( &mut self, read: &mut [C::Word], write: &[C::Word], ) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

async fn transfer_in_place( &mut self, words: &mut [C::Word], ) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

async fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

impl<P, M, C, S, R, T> SpiBus<<C as CharSize>::Word> for SpiFuture<Config<P, M, C>, Duplex, R, T>

where S: Sercom, Config<P, M, C>: ValidConfig<Sercom = S>, P: ValidPads, M: MasterMode, C: Size + 'static, C::Word: PrimInt + AsPrimitive<DataWidth> + Beat, DataWidth: AsPrimitive<C::Word>, R: AnyChannel<Status = ReadyFuture>, T: AnyChannel<Status = ReadyFuture>,

SpiBus implementation for Spi, using DMA transfers.

async fn read(&mut self, words: &mut [C::Word]) -> Result<(), Self::Error>

Read words from the slave.

async fn write(&mut self, words: &[C::Word]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

async fn transfer( &mut self, read: &mut [C::Word], write: &[C::Word], ) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

async fn transfer_in_place( &mut self, words: &mut [C::Word], ) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

async fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

impl<P, M, Z, D, R, S> Write for SpiFuture<Config<P, M, Z>, D, R, NoneT>

where Config<P, M, Z>: ValidConfig<Sercom = S>, P: ValidPads, M: OpMode, Z: Size<Word = u8> + 'static, D: Transmit, S: Sercom,

embedded_io::Write implementation for Transmit SpiFutures in either Slave or MasterMode.

async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error>

Write a buffer into this writer, returning how many bytes were written.

async fn flush(&mut self) -> Result<(), Self::Error>

Flush this output stream, ensuring that all intermediately buffered contents reach their destination.

async fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::Error>

Write an entire buffer into this writer.

impl<P, M, Z, D, R, T, S> Write for SpiFuture<Config<P, M, Z>, D, R, T>

where P: ValidPads, M: OpMode, Z: Size<Word = u8> + 'static, Config<P, M, Z>: ValidConfig<Sercom = S>, D: Transmit, S: Sercom, T: AnyChannel<Status = ReadyFuture>,

embedded_io::Write implementation for Transmit SpiFutures in either Slave or MasterMode, using DMA transfers.

async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error>

Write a buffer into this writer, returning how many bytes were written.

async fn flush(&mut self) -> Result<(), Self::Error>

Flush this output stream, ensuring that all intermediately buffered contents reach their destination.

async fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::Error>

Write an entire buffer into this writer.