[−]Struct metro_m0::NVIC
Nested Vector Interrupt Controller
Methods
impl NVIC
pub fn clear_pending<I>(&mut self, interrupt: I) where
I: Nr,
I: Nr,
Use NVIC::unpend
Clears interrupt
's pending state
pub fn disable<I>(&mut self, interrupt: I) where
I: Nr,
I: Nr,
Disables interrupt
pub fn enable<I>(&mut self, interrupt: I) where
I: Nr,
I: Nr,
Enables interrupt
pub fn get_priority<I>(interrupt: I) -> u8 where
I: Nr,
I: Nr,
Returns the NVIC priority of interrupt
NOTE NVIC encodes priority in the highest bits of a byte so values like 1
and 2
map
to the same priority. Also for NVIC priorities, a lower value (e.g. 16
) has higher
priority (urgency) than a larger value (e.g. 32
).
pub fn is_enabled<I>(interrupt: I) -> bool where
I: Nr,
I: Nr,
Checks if interrupt
is enabled
pub fn is_pending<I>(interrupt: I) -> bool where
I: Nr,
I: Nr,
Checks if interrupt
is pending
pub fn pend<I>(interrupt: I) where
I: Nr,
I: Nr,
Forces interrupt
into pending state
pub fn set_pending<I>(&mut self, interrupt: I) where
I: Nr,
I: Nr,
Use NVIC::pend
Forces interrupt
into pending state
pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8) where
I: Nr,
I: Nr,
Sets the "priority" of interrupt
to prio
NOTE See get_priority
method for an explanation
of how NVIC priorities work.
On ARMv6-M, updating an interrupt priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single atomic write operation.
Unsafety
Changing priority levels can break priority-based critical sections (see
register::basepri
) and compromise memory safety.
pub fn unpend<I>(interrupt: I) where
I: Nr,
I: Nr,
Clears interrupt
's pending state
impl NVIC
pub fn ptr() -> *const RegisterBlock
Returns a pointer to the register block
Trait Implementations
Auto Trait Implementations
Blanket Implementations
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impl<T, U> TryInto for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
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impl<T> Borrow for T where
T: ?Sized,
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T: ?Sized,
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T: ?Sized,
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T: ?Sized,
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T: 'static + ?Sized,
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